subsystems + Create high-speed interfaces from FPGA to peripherals Skills and Experience Required: + Experience implementing DSP algorithms on FPGA using VHDL/Verilog + Understanding of digital & RF hardware + Experience interfacing FPGA with peripherals + Familiarity with the product life cycle Bonus: + Embedded C/C++ More ❯
Employment Type: Permanent
Salary: £50000 - £65000/annum Performance related bonus
oxford district, south east england, United Kingdom
Ubique Systems
years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn More ❯
oxford district, south east england, United Kingdom
K&K Talents
Mandatory Skills: SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn Note: Applicants for employment in the United Kingdom should possess work More ❯
Oxford, Oxfordshire, United Kingdom Hybrid / WFH Options
Darwin Recruitment
how satellite systems work together. Experience writing test plans and running verification on avionics. Nice to have (but not essential): FPGA development (VHDL or Verilog). Python scripting for test automation. Experience working in a cleanroom or handling flight hardware. Background in GNSS, time sync, or radiation tolerance in LEO. More ❯
oxford district, south east england, United Kingdom
Skywaves Rise
Required Skills & Knowledge: Micro-architecture design RTL coding in System Verilog for aviation project Synthesis using Design Compiler/Fusion compiler 5 years SDC development LEC failure debugs RTL/gate level debug experience using tools such as Verdi More ❯
oxford district, south east england, united kingdom
Stackstudio Digital Ltd
Role - DV Engineer Location:EU/Remote Mandatory Skill: IP/SOC verification Verilog, System Verilog, UVM Code Coverage, functional coverage Industry Experience : 5 to 10 years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System VerilogMore ❯
oxford district, south east england, united kingdom
Stackstudio Digital Ltd
Role - RTL Design/LeadLocation:EU/Remote Mandatory Skill: SoC Integrtion, IP integration RTL design & Coding RTL lint, RTL CDC Verilog/System Verilog Industry Experience : 5 to 10 years SoC Design engineer with experience working on SOCs based on ARM Architecture Should be familiar with AMBA based bus More ❯
