12 of 12 Remote UVM Jobs in the South East

project delivery Expertise in developing complex FPGA architectures and implementations using VHDL, Simulink, and targeting Xilinx, Intel, or Microsemi devices Proficiency in FPGA verification using VHDL and SystemVerilog/UVM testbench methodologies Familiarity with FPGA toolsets and Mentor Graphics verification tools such as QuestaSim and ModelSim Ability to write low-level software in C for FPGA testing and embedded system More ❯

project delivery Expertise in developing complex FPGA architectures and implementations using VHDL, Simulink, and targeting Xilinx, Intel, or Microsemi devices Proficiency in FPGA verification using VHDL and SystemVerilog/UVM testbench methodologies Familiarity with FPGA toolsets and Mentor Graphics verification tools such as QuestaSim and ModelSim Ability to write low-level software in C for FPGA testing and embedded system More ❯

project delivery Expertise in developing complex FPGA architectures and implementations using VHDL, Simulink, and targeting Xilinx, Intel, or Microsemi devices Proficiency in FPGA verification using VHDL and SystemVerilog/UVM testbench methodologies Familiarity with FPGA toolsets and Mentor Graphics verification tools such as QuestaSim and ModelSim Ability to write low-level software in C for FPGA testing and embedded system More ❯

project delivery Expertise in developing complex FPGA architectures and implementations using VHDL, Simulink, and targeting Xilinx, Intel, or Microsemi devices Proficiency in FPGA verification using VHDL and SystemVerilog/UVM testbench methodologies Familiarity with FPGA toolsets and Mentor Graphics verification tools such as QuestaSim and ModelSim Ability to write low-level software in C for FPGA testing and embedded system More ❯

ASIC systems Strong grasp of synthesis, timing closure, and resource optimisation for high-speed signal processing applications Experience developing and integrating IP in multi-block hardware systems Familiarity with UVM verification methodologies and testbench development Skilled in simulation, lab-based validation, and system integration using industry-standard tools Ability to collaborate across design, verification, and algorithm teams Strong documentation and More ❯

throughput FPGA or ASIC IP, ideally in signal processing or comms applications Expertise in simulation, synthesis, timing optimisation, and lab-based validation Proficiency with industry-standard EDA tools and UVM-based verification Ability to lead projects, define architecture, and support junior engineers Comfortable collaborating across hardware, software, and systems disciplines Space or satellite comms experience is not essential—but curiosity More ❯

related discipline. Metric driven verification - verification planning, requirements extraction - Directed and constrained random verification - Functional and code coverage analysis SystemVerilog - SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills - RTL - Testbench, OOP - Gate level (including SDF) Scripting experience with Ruby, sh/csh, TCL, Make, Perl Power aware verification (using CPF/UPF More ❯

IC's. Metric driven verification - verification planning, requirements extraction - Directed and constrained random verification - Functional and code coverage analysis SystemVerilog - SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills - RTL - Testbench, OOP - Gate level (including SDF) Strong ability to interpret results and resolve problems An innovative, creative, lateral thinking problem solver Preferred Skills More ❯

About Us Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools More ❯

the Algorithm team to understand requirements and translate them into architectures for RTL implementations. Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches. Actively engage with and adhere to engineering methodology, processes and design techniques, being able to offer improvements to efficiency and quality for both the design flow and the … timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis Familiar with the AMBA bus protocol Understanding of UVM verification techniques or practical experience using UVM for IP verification. This is a Hybrid working role and you must be able to work onsite 2-3 days per week. For More ❯

Work closely with the exec team to translate product requirements into hardware team deliverables. Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches. Lead engineering methodology, processes and design techniques. Nurture professional growth of team members through regular mentoring, coaching, and feedback Skills, Knowledge & Expertise: Track record of building and leading … for ASIC and FPGA. Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis. Understanding of UVM verification techniques or practical experience using UVM for IP verification. This is a Hybrid working role and you must be able to work onsite 2-3 days per week. For More ❯

get in touch. 1. Verification Lead (Permanent) Location: Hertfordshire, UK (Hybrid/Onsite Flexible) Leadership role managing SoC/IP-level verification Requirements: 6+ years experience, strong SystemVerilog/UVM, team mentorship 2. Hardware Verification Engineer (Permanent/Contract) Location: Hemel Hempstead, UK (Hybrid Preferred | Remote Considered) Type: Contract (Outside IR35) Focus: RISC-V, GPU, AI, complex SoCs Requirements: 5+ … years experience, SystemVerilog/UVM, scripting 3. Junior/Mid-Level Verification Engineer (Permanent) Location: Hertfordshire, UK (Hybrid/Onsite Flexible) Perfect for engineers early in their verification careers Requirements: 1+ year experience, familiarity with SystemVerilog/UVM If any of these sound like a fit, please feel free to reach out or send your CV. If these roles are More ❯