5 of 5 VHDL Jobs in South Wales

designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers Memory controllers PCB Layout Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key More ❯

designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers Memory controllers PCB Layout Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key More ❯

activities Essential Skills & Experience: Knowledge/Experience of developing/modelling/simulating software in at least one of the following areas: RF telecommunications, waveforms, OSI model, SIGINT, EW VHDL VERILOG Experience with SDR architecture Agile development methodologies. C#, C, C++, Python and Database architecture. Desirable Experience XML Networked systems JICD Restful and/or RPC API Library agnostic code More ❯

simulation (SPICE or other SPICE-based software) + Embedded software development in a Linux environment. + High speed digital design e.g. DDR Bonus: + Knowledge of FPGA design using VHDL code + EMC compliance What you ll get: + £35 60k + Private medical insurance + Generous paid time off scheme Even if you feel like you match only most More ❯

simulation (SPICE or other SPICE-based software) + Embedded software development in a Linux environment. + High speed digital design e.g. DDR Bonus: + Knowledge of FPGA design using VHDL code + EMC compliance What you’ll get: + £35 – 60k + Private medical insurance + Generous paid time off scheme Even if you feel like you match only most More ❯