2 of 2 Remote/Hybrid UVM Jobs in the South West

design implementations using VHDL, Simulink, etc., targeting Xilinx, Intel, and Microsemi devices. Ability to verify complex FPGA implementations using VHDL and System Verilog/UVM test-bench methodologies. Proficiency in FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Strong skills in generating low-level software (C) for FPGA ...

performance, and engineering best practices. Job Requirements Extensive experience with constrained-random verification and ownership of complex verification environments. Strong expertise in SystemVerilog and UVM (SV-UVM) for developing scalable verification code and testbenches. Proficiency in scripting to support verification workflows and automation. Strong software engineering knowledge, including object-oriented ...