6 of 6 Remote/Hybrid ASIC Engineer Jobs in the UK

Build the Silicon Behind a World-First Communications Platform. If you're an experienced ASIC Design Engineer looking for your next challenge, opportunities like this don't come around often. We're partnering with an innovative semiconductor company that's developing groundbreaking communications technology designed to transform global … mission is bold: creating advanced silicon that enables reliable mobile communications in places traditional networks simply can't reach. This isn't another incremental ASIC project. It's an opportunity to help build technology with genuine global impact while working alongside some of the brightest minds in ASIC ...

technology-focused engineering company is seeking a Hardware Design Engineer to implement and verify advanced electronic systems. The role involves hands-on work spanning hardware bring-up, FPGA/ASIC validation, and embedded software development. Candidates should have a BSc or higher in related fields and 10+ years ...

Advanced Micro Devices, Inc. in Edinburgh is seeking a senior engineer to drive FPGA and ASIC development across both RTL and software-enabled platforms. You will influence architectural decisions, mentor peers, and own high-impact IPs and subsystems for diverse markets worldwide. The role offers hybrid work from ...

MintNeuro in London seeks a Senior Digital Design Engineer to own front-end digital design and verification for next-generation mixed-signal ASICs used in implantable neural interfaces. You will write clean Verilog/SystemVerilog, develop robust verification environments, drive RTL from concept to tape-out, and collaborate with ...

Swediumglobal is seeking a Senior ASIC Design Verification Engineer to work remotely from the UK/EU. The ideal candidate will have over 8 years of experience, with strong expertise in UVM/SystemVerilog and hands-on experience with HPC protocols such as PCIe and DDR. This role ...

Swedium Global Services is seeking a Senior Physical Design Engineer (remote from the UK/EU) to drive timing closure for ASIC/SoC designs across advanced nodes, including <5nm processes. You will work closely with PD, RTL, Synthesis, and Signoff teams to resolve timing and clock-related ...