18 of 18 Remote PCIe Jobs in the UK excluding London

hard work. Design tools such as Xilinx,TCL,Verilog,System Verilogand UVM FPGAarchitectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. Auto-generated code usingmodel driven engineeringusingMatlabandSimulinktools Derivation of detailedFPGA/Firmwarerequirements and architecture fromsystem requirements A structured approach toFPGA/firmware design(RTCA DO More ❯

ARM-based designs and/or ARM System Architectures. Familiarity with ARM debugger and trace features e.g ARM DS, DSTREAM. Experience with verification methodologies - UVM/OVM. Knowledge of PCIe and CXL will be a plus. Accommodations at Arm At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please More ❯

code under version control. Understanding of Arm based systems, including SoC system architecture and AMBA protocols. Experience of working with high speed I/O peripherals, such as LPDDR, PCIe, Ethernet, USB, HBM etc. with expertise in debugging in both simulation and hardware. Experience with Tcl, Python or other scripting languages. "Nice To Have" Skills and Experience: Exposure to the More ❯

designs and/or ARM System Architectures. Familiarity with ARM debugger and trace features e.g ARM DS, DSTREAM. Knowledge of memory subsystems and/or high speed peripherals (e.g. PCIe/CXL) will be a plus, including integration of these IP models into a design. Accommodations at Arm At Arm, we want to build extraordinary teams. If you need an More ❯

devices and high-speed interconnect technology Proficient in schematic capture using Mentor Graphics (Siemens EDA) DxDesigner or similar tools Experience of high-speed serial communication interfaces/protocols (e.g., PCIe, Ethernet/IEEE802.3, SPI, I2C) and high-speed bus architectures (e.g., DDR3/4) Use of high-speed digital design techniques such as signal termination, controlled impedance, matched length tracking More ❯

devices and high-speed interconnect technology Proficient in schematic capture using Mentor Graphics (Siemens EDA) DxDesigner or similar tools Experience of high-speed serial communication interfaces/protocols (e.g. PCIe, Ethernet/IEEE802.3, SPI, I2C, etc.) and high-speed bus architectures (e.g. DDR3/4) Use of high-speed digital design techniques such as signal termination, controlled impedance, matched length More ❯

such as TCL, Perl, or Python. Nice To Have Skills and Experience: Experience with Arm-based designs and/or Arm System Architectures. Experience developing and integrating subsystems for PCIe, UCIe, DDR/LPDDR/HBM, Ethernet, etc. High-level programming experience such as C/C++ and/or assembly language programming. Experience with embedded operating systems, device drivers More ❯

communication and collaboration skills across teamsAbility to manage workload effectively in a hybrid working environment Desirable Skills Experience in processor or application-specific block designHigh-speed interface integration (e.g., PCIe, DDR)Arithmetic pipeline or floating-point unit designThird-party IP integration Synth esis, STA, and DFT knowledgeExposure to project planning or team leadership More ❯

Technical team leadership, mentoring or coaching 'Nice to Have' Skills and Experience: Experience with Arm-based designs, Arm System Architectures and AMBA standards Experience developing and integrating subsystems for PCIe, UCIe, DDR/LPDDR/HBM, Ethernet etc. High level programming experience such as C/C++ and/or assembly language programming Working in global IP and SoC development More ❯

the following combination of education and experience: BS in Electrical or Computer Engineering or equivalent. Practical experience and knowledge of one or more high-speed interface protocols such as PCIe, CXL, UCIe, NVMe, Ethernet, USB, DDRx, HBM, AMBA. Knowledge of controllers for one or more high-speed interface protocols Expertise in coding with SystemVerilog, and UVM is mandatory Experience with More ❯

and working with FPGA design, PCB layouts and embedded systems. You’ll need: PCB layout and schematic design experience Knowledge of VHDL or Verilog based FPGA Design Knowledge of PCIe, SPU, I2C etc A background in Digital Signal Processing (preferred) Experience with high-speed digital design (preferred) There are great salary and bonus packages available, as well as hybrid working More ❯

teams and software teams Excellent written and spoken English language skills "Nice To Have" Skills and Experience : Arm CPU Architecture and AMBA bus protocols High speed I/O : PCIe, CXL, CCIX Experience with failure modes, effects, and diagnostic analysis (FMEDA) or dependent failure analysis (DFA) would be a plus. Understanding of Function Safety (FuSa) knowledges and processes, including knowledges More ❯

highly successful, they maintain a small business atmosphere with a start-up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. More ❯

highly successful, they maintain a small business atmosphere with a start-up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols – Ethernet, PCIe, USB, NVMe, CXL etc C/C++. More ❯

/PhD in EE or CS preferred. Minimum 10 years of infrastructure system architecture experience. Experience should include memory systems, Quality-Of-Service, and high-speed IO interfaces like PCIe and CXL. Extensive experience in SoC design, and the challenges involved in integrating IP and analyzing system-level performance and behavior. Ability to quantify and make trade-offs between power More ❯

to enable our partners to produce outstanding systems! Responsibilities: As a creative verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/PCIe/CXL, DDRx/LPDDRx integration verification in SoC RTL. Your key responsibilities will include writing test plans, defining test methodologies, developing SystemVerilog/Verilog testbenches and tests, and debugging … Crossing verification Experienced in GLS, DFT/DFD, Power Aware verification techniques Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc.) In Return: This is a More ❯

to enable our partners to produce outstanding systems! Responsibilities: As a creative verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/PCIe/CXL, DDRx/LPDDRx integration verification in SoC RTL. Your key responsibilities will include writing test plans, defining test methodologies, developing SystemVerilog/Verilog testbenches and tests, and debugging … Crossing verification Experienced in GLS, DFT/DFD, Power Aware verification techniques Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc.) In Return: This is a More ❯

NVIDIA Blackwell infrastructure, spanning hardware, software, and storage domains. The ideal candidate will be highly proficient in the following areas: Hardware Advanced multi-GPU system design High-speed interconnects: PCIe, NVLink, InfiniBand Thermal and power efficiency modelling Expert-level knowledge of NVIDIA Blackwell infrastructure Optimizing CPU/GPU ratios in HPC environments Software AI/HPC workload simulation and performance More ❯