23 of 23 RISC-V Jobs in the UK excluding London

Further development of proven prototypes to a deployment standard Development of software in a real-time embedded environment using Linux. (e.g. Microblaze or RISC-V using C/C++) Experience of working with and configuring embedded Linux systems with tools such as Buildroot and Yocto Experience of working ...

Further development of proven prototypes to a deployment standard Development of software in a real-time embedded environment using Linux. (e.g. Microblaze or RISC-V using C/C++) Working with and configuring embedded Linux systems with tools such as Buildroot and Yocto Working with Uboot, Kernel config ...

Further development of proven prototypes to a deployment standard Development of software in a Real Time Embedded environment using Linux. (eg Microblaze or RISC-V using C/C++) Experience of working with and configuring Embedded Linux systems with tools such as Buildroot and Yocto Experience of working ...

experiments and make accurate electrical measurements. Experience developing software to safety standards such as IEC 60730 or similar is desirable. Experience in RISC-V is desirable. Experience of safe working in a laboratory environment, testing and debugging software on mains voltage and high-speed machines is desirable. Fluent ...

Knowledge & Skills Degree or equivalent in Engineering, Computing or similar subject Python and embedded C Programming Language Appreciation of digital electronics SPARC, ARM, RISC-V architectures preferable Knowledge of CAN, Serial, and IP communication protocols BitBucket/GIT version control Agile/JIRA development approach Flexible and adaptable ...

development and writing adaptive unit tests Excellent attention to detail and a passion for producing high‐quality, robust designs Desirable experience Knowledge of RISC‐V architecture Expertise in one or more CPU microarchitecture areas, including: Instruction Fetch, Instruction Decode, Register Renaming, Instruction Scheduling, Vector Processing, Load‐Store Units ...

driven development and writing adaptive unit tests. Excellent attention to detail and passion for producing high‐quality, robust designs. Desirable Experience Knowledge of RISC‐V architecture. Expertise in one or more CPU microarchitecture areas, including: Instruction Fetch Instruction Decode Register Renaming Instruction Scheduling Vector Processing Load‐Store Units ...

Responsibilities: Working on a variety of tools and target libraries to build , maintain, and enhance a complete toolchain for a new multi – core RISC – V processor . The toolchain consists of a Clang C/C++ compiler, runtime libraries and LLD linker. Maintaining and enhancing the currently shipping ...

Codasip is seeking a DV Manager to lead the expansion of our Verification team across multiple Design Centers in the UK, including Bristol. This role involves shaping the company's strategy and ensuring effective project ...

Excellent verbal and written communications skills Ways to stand out from the crowd: Familiarity with CPU architectures such as Arm Architecture (AArch32, AArch64), RISC-V, x86_64, PowerPC or DSPs and engaging with pre-silicon compiler and toolchain contributions. A track record of working with industry standard compiler ...

This includes work in areas such as: - RISC-V firmware and driver development. - Software hardening and security tools. - Embedded operating systems (in Rust and C). - Compilers, code generators, and linters. - Simulators and emulators (e.g. QEMU). - Electronic design automation (EDA) tools. - Performance and code size analysis. - Cloud … time systems. - Familiarity with CI/CD for embedded or systems software. - Strong knowledge of computer architecture; some experience with assembly languages (x86, RISC-V); familiarity with hardware design is a plus. - Good knowledge of Linux. - Experience contributing to open source projects. - Higher degree levels and academic research ...

XMOS is seeking a Senior AI Compiler Engineer to lead the development of the LLVM-based toolchain for a new multi-core RISC-V processor, with a focus on enabling AI and ML workloads on XMOS hardware. You will join the Compilation Tools team in Bristol ...

high-volume silicon Expertise in performance modelling and power analysis Strong cross-functional communication and leadership capability Experience with CPU Architecture Familiarity with RISC-V and or GEM 5 would be a bonus ...

knowledge of some or all of the following skills: Floating point unit – algorithms – FPU Deep understanding of APU/CPU/GPU/RISC-V environments Arithmetic logic units (ALUs) Computer arithmetic/computer science HPC – high performance computing applications FMA or SIMD algorithms Registers – flip-flops – data ...

communication skills. Education Bachelor’s degree in a technical field (Electrical Engineering, Computer Science), Marketing, or Business. Nice to Haves Direct experience with RISC‐V or ARM architectures/CPU licensing specifically. Additional Information This position requires a successful background and reference checks and satisfactory proof of your ...

hiring a CPU Microarchitecture/RTL design engineer to join a team delivering industry‐leading CPU cores based on the open‐source RISC‐V architecture. You will design features, extend ISA, and integrate content into Chisel/FIRRTL while coordinating with verification and physical teams. You will contribute ...

order execution. Experience with cycle-accurate microarchitecture simulation and performance modelling. Strong programming skills in C, C++, Python, and Arm64 or RISC-V assembly. Keywords: CPU Research Engineer/Microarchitecture/Out-of-Order Execution/Branch Prediction/Superscalar/gem5/Cycle-Accurate Simulation/Mobile …/IPC/Energy Efficiency/C/C++/Python/Arm64/RISC-V/LLVM/GCC/Compiler/Performance Modelling/Cambridge/UK If you are interested in the CPU Research Engineer position, please send a copy of your ...

Experience) Location: Cambridge, UK (Hybrid) Salary: Competitive Position: Permanent About the Role Working on projects such as OpenTitan Root of Trust and Ibex RISC-V CPU , you'll collaborate with world-leading partners and apply industry-standard verification methodologies to cutting-edge silicon designs. As a Digital Verification … Python and/or C. Familiarity with Git or other version control systems. Strong communication skills and a collaborative mindset. Desirable Exposure to RISC-V or CPU verification. Knowledge of formal verification. Experience with scripting and verification automation. Interest in open-source hardware and silicon development. What ...

will be part of a team of engineers who are passionate about designing industry-leading CPU cores, based on the revolutionary open‐source RISC‐V architecture. The role involves bringing new hardware IP to market quickly, with high quality and exceptional performance in a fast‐paced dynamic environment. … Responsibilities Architect, design and implement new features, performance improvements, and ISA extensions in RISC‐V CPU core generators using Chisel. Integrate new design content into SiFive’s Chisel/FIRRTL framework and contribute to improvements to that framework to enable automatic configuration/generation of documentation, verification testbenches ...

microarchitecture and ISA working committees. Required Qualifications Deep Architecture Expertise: Proven track record in high‐performance CPU core development (e.g., x86, ARM, or RISC‐V) with deep knowledge of Out‐of‐Order execution, branch prediction, renaming, speculative execution, cache hierarchies, and coherency protocols. ISA Mastery: Authoritative understanding … high‐performance CPU silicon designs. Active contributions to open‐source architectural frameworks, compiler backends (LLVM/GCC), or open ISA working groups (e.g., RISC‐V International). Familiarity with advanced silicon packaging (chiplets, 3D stacking) and their microarchitectural implications. #J-18808-Ljbffr ...

About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing … across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits. At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation ...

SiFive, a leader in RISC-V, seeks a hardware engineer to specify, design and implement new arithmetic operators for RISC-V instructions, including floating-point, vector, crypto and integer operations. Hybrid work with one office day per week. You will optimize timing, area and power, perform ...

aligning efforts with company strategy and objectives. Collaborate with other Verification Leads to share responsibilities, ensuring effective management of workload and resources. Verify RISC-V processors and extensions. Take ownership of IP Verification projects. Contribute to determining the company’s strategy regarding verification. Tackle the challenges unique … effectively and prioritize tasks in a dynamic environment. Excellent leadership and communication skills, with the ability to motivate and inspire teams. Understanding of RISC-V Architecture. Knowledge of computer systems and architecture. Experience with advanced verification techniques. #J-18808-Ljbffr ...