20 of 20 Permanent SystemVerilog Jobs in the UK

Bristol Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at the forefront of innovation. Apply More ❯

Stevenage Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at the forefront of innovation. Apply More ❯

within Defence, Aerospace or other high-integrity engineering domains. Strong communication skills and ability to work within structured engineering processes. Technical Knowledge Beneficial to the Role VHDL , Verilog or SystemVerilog for digital design and implementation. Verification testbench architecture using SystemVerilog or C++ . Advanced verification methodologies such as OSVVM , UVVM or advanced VHDL verification techniques. Requirements management using IBM DOORS More ❯

The selected engineer will work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs. Responsibilities include: Developing RTL in SystemVerilog for high-performance FPGA/Adaptive SoC designs Implementing and optimizing high-speed connectivity protocols Collaborating with cross-functional teams on integration, timing closure, and validation Driving improvements across synthesis …/CD development workflows using Git and scripting automation Required Skills & Experience The proposed candidate must meet the following qualifications: A. RTL Design & Coding Deep hands-on experience with SystemVerilog HDL for RTL design Proven ability to develop IP targeting FPGA/Adaptive SoC platforms B. High-Speed Protocols Strong experience with: 100Gb Ethernet PCIe Gen5 AMBA/AXI interface … Scripting & Automation Proficiency in scripting: Python, Tcl Able to automate design, build, and verification workflows Comfortable with Git for CI/CD integration Deliverables RTL IP blocks developed in SystemVerilog according to project specification Timing-closed design implementations for target Adaptive SoCs Documentation for IP integration and usage Scripts and automation to support CI/CD workflows Weekly status updates More ❯

and development of digital RTL blocks under guidance from senior engineers Contribute to microarchitecture definition by analysing specifications and documenting design decisions Write clean, synthesisable RTL in Verilog or SystemVerilog for small to medium-sized logic blocks Perform basic verification of RTL using simulation tools, including writing simple testbenches and assertions Assist in debugging functional, timing, or implementation-related problems … Engineering, Computer Engineering, Computer Science, or a related field Strong understanding of digital logic design, computer architecture, and basic hardware design principles Familiarity with RTL design using Verilog or SystemVerilog (university, internship, or project experience) Knowledge of hardware description languages, simulation concepts, and basic verification methods Experience with scripting languages such as Python, Tcl, or Bash Familiarity with EDA tools More ❯

quarter) 6 Months. 1-2 Days (Flexible Hybrid). 6 Months Fixed Term. (Possible Extension) DOE Core Scope: Design high-performance IP targeting FPGA/Adaptive SoC technology using SystemVerilog RTL. . click apply for full job details More ❯

quarter) 6 Months. 1-2 Days (Flexible Hybrid). 6 Months Fixed Term. (Possible Extension) DOE Core Scope: Design high-performance IP targeting FPGA/Adaptive SoC technology using SystemVerilog RTL. Deliver synthesis-ready designs meeting timing an... More ❯

be doing as a FPGA Design Engineer ? Developing complex FPGA architectures and design implementations using VHDL, Simulink, targeting Xilinx, Intel, and Microsemi devices. Verifying FPGA implementations using VHDL and SystemVerilog/UVM test-bench methodologies. Utilizing FPGA design toolsets and Mentor verification tools such as QuestaSim and ModelSim. Writing low-level software in C to support FPGA testing and integration … for in our next FPGA Design Engineer ? Degree-qualified (or equivalent) with significant experience in FPGA development. Strong VHDL language and design skills. Proven verification skills using VHDL and SystemVerilog methodologies. Demonstrable experience designing for Xilinx, Intel, or Microsemi FPGAs. Experience in professionally configuring and documenting designs. Experience working in large, multidiscipline teams. My client is keen to get this More ❯

quarter) 6 Months. 1-2 Days (Flexible Hybrid). 6 Months Fixed Term. (Possible Extension) DOE Core Scope: Design high-performance IP targeting FPGA/Adaptive SoC technology using SystemVerilog RTL. Deliver synthesis-ready designs meeting timing and integration requirements. Key Skills: System Verilog RTL design 100Gb Ethernet, PCIe Gen5, AMBA/AXI Deep understanding of FPGA/Adaptive SoC More ❯

you need?: Degree-qualified (or equivalent) candidates with significant experience in FPGA development. Proficient in VHDL language and Design Skills. (Highly essential) Proficient in verification skills using VHDL and SystemVerilog methodologies. (Highly essential) Extensive experience designing for Xilinx, Intel, or Microsemi FPGAs. Experience in professional configuration and documentation of designs. Experience working as part of a large multidisciplinary team. (Please More ❯

The selected engineer will work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs. Responsibilities include: Developing RTL in SystemVerilog for high-p More ❯

The selected engineer will work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs. Responsibilities include: Developing RTL in SystemVerilog for high-p More ❯

The selected engineer will work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs. Responsibilities include: Developing RTL in SystemVerilog for high-p More ❯

The selected engineer will work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs. Responsibilities include: Developing RTL in SystemVerilog for high-p... More ❯

Stevenage Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at the forefront of innovation. Apply More ❯

engineering experience (implementation, simulation, verification and test) Strong background in Digital Signal Processing (DSP) design and optimisation Excellent academic background with a degree from a top university Proficiency in SystemVerilog or VHDL Proven ability to take technical ownership, collaborate effectively, and deliver complex projects Position: Senior FPGA Engineer Location: Cambridge Salary: £70k–£120k + equity Key Skills: FPGA, DSP, Verilog More ❯

A Digital Design Engineer with proficiency in RTL coding and a background in the design of high speed digital circuits using advanced CMOS technologies will join the talented team of an exciting name in the Semiconductor industry. Rewarding opportunity to More ❯

in design reviews and contribute to system architecture and documentation. Skills & Experience Field Programmable Gate Arrays and digital signal processing Proven experience in FPGA design (VHDL/Verilog/SystemVerilog). Strong background in DSP implementation and digital transceiver design. Solid understanding of digital and RF hardware principles. Familiarity with AXI bus architectures and software-controlled FPGA IP. Competent in More ❯

of next-generation satellite communications, with significant scope to influence both product direction and engineering methodology. What theyre looking for: Extensive experience developing complex digital designs in Verilog or SystemVerilog Strong track record delivering high-throughput FPGA or ASIC IP, ideally in signal processing or comms applications Expertise in simulation, synthesis, timing optimisation, and lab-based validation Proficiency with industry More ❯

deliver high-performance solutions Stay at the forefront of FPGA technology and help shape our roadmap What we're looking for Strong FPGA design background (VHDL/Verilog/SystemVerilog) Experience leading or mentoring engineering teams Proven delivery of complex FPGA systems Solid grasp of RTL design, timing closure, verification, and integration Confident communicator who thrives on problem-solving and More ❯