art EDA tools for DFT, design, and verification (Mentor, Cadence, Synopsys) STA DFT Test mode timing constraint development and analysis In-depth knowledge of Verilog HDL and experience with simulators and waveform debugging tools TCL scripting; Python scripting is a plus Bachelor Degree minimum required in Electronics or other related more »
Glasgow, Lanarkshire, Scotland, United Kingdom Hybrid / WFH Options
Verto People
understanding of analogue and digital circuits. Understanding of product design from spec with consideration of DFT and DFM EMC knowledge and experience FPGAs using Verilog Good understanding of test automation tools e.g. LabView Commutable to Glasgow more »
generation, transmission and distribution industry. REQUIRED EXPERIENCE Minimum of 12 years’ experience in circuit design and circuit layout. Familiarity with Microprocessor designs, FPGA development (Verilog), analog measurement, analog filtering, digital filtering, A/D implementations, control and power amplifiers. Familiarity with various simulation tools (SPICE, PSIM, ModelSim). An understanding more »
