1 to 8 of 8 Verilog Jobs in Hertfordshire

activities: Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog/UVM test-bench methodologies. Using FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Generating low-level software (C) to facilitate FPGA test more »

FPGA Design Engineer designing and developing technology solutions. Knowledge of toolchains such as Vivado/Quartus and an HDL language such as VHDL/Verilog, and experience in running simulations and testbenches and performing hardware-level debugging Knowledge of some of the following beneficial: DSP design and modelling, developing with more »

Design. Knowledge, Skills & Experience: 5 years of significant experience in FPGA design and be able to demonstrate a sound understanding of the principals involved Verilog design on a range of FPGA and SOC devices (Xilinx, MicroSemi, Lattice, Altera). Experience of working in multi-disciplinary teams on fast paced projects more »

include producing HDL code for VITA-49 or similar network SDR transport protocols; designing and implementing digital IF algorithms and architectures using VHDL or Verilog, developing and testing FPGA firmware and software as well as performing simulation and verification of FPGA designs. Remuneration Package: A generous base salary will be more »

include producing HDL code for VITA-49 or similar network SDR transport protocols; designing and implementing digital IF algorithms and architectures using VHDL or Verilog, developing and testing FPGA firmware and software as well as performing simulation and verification of FPGA designs. Remuneration Package: A generous base salary will be more »

TCL designs utilizing IP Cores for rapid development. 6. Build scripting to support continuous integration. 7. Design and development of test benches to prove Verilog code. 8. Conduct floor-planning and timing analysis of designs, achieving timing closure. 9. Test of HDL code on target platform. 10. Integration of firmware more »

TCL designs utilizing IP Cores for rapid development. 6. Build scripting to support continuous integration. 7. Design and development of test benches to prove Verilog code. 8. Conduct floor-planning and timing analysis of designs, achieving timing closure. 9. Test of HDL code on target platform. 10. Integration of firmware more »

from concept to production. Requirements: Bachelor's degree in Electrical Engineering, Computer Engineering, or related field. Demonstrated experience in FPGA design, including VHDL or Verilog development. Excellent problem-solving skills and attention to detail. Effective communication and teamwork abilities. Benefits: £60,000 - £80,000 Salary and comprehensive benefits package Opportunity more »