1 to 2 of 2 Contract Cadence Jobs with Hybrid or WFH Options

are as follows : VHDL/Verilog/System Verilog System RTL coding ASIC design methodology BIST RTL, ATPG, BIST, ECC and Redundancy Experience with Cadence DFT design flow Strong knowledge of JTAG The professional work environment and documentation will be in English. If you are available now or potentially more »

months. Responsibilities & Experience: Excellent ATPG/MBIST skills are required. Experience building a new flow from scratch. Must be familiar with Synopsys/Cadence/Mentor industry standard toolsets. Previous experience of EDA tool specification/procurement is nice to have Strong ATE bring up and production support skills. more »