FPGA Design - Lead Research Engineer "CLEARANCE REQUIRED"
- Hiring Organisation
- GE Vernova
- Location
- Malta, New York, United States
- Employment Type
- Permanent
- Salary
- USD Annual
disciplines with a minimum of 5 years of industry experience. 2-5 years of strong FPGA and SoC design experience using Verilog, SystemVerilog and VHDL 2-5 years of hands-on experience with Xilinx and/or Intel (Altera) FPGA devices, tools, and ecosystems (e.g., ModelSim, Intel Quartus, Xilinx Vivado ...