of UVM, SVA, VIP, and UPF for digital IC design verification Familiar with Linux OS, revision control like Git and scripting languages like Bash, Tcl, and Python Desirable Skills and Experience Experience with unit test frameworks like pytest, build scripting, Jenkins CI/CD automation Familiar with Xilinx FPGA development more »
design flow - RTL-GDS2 Understanding of UVM and system verilog verification processes embedded hardware, systems, firmware coding/scripting in python, C++, system C, TcL, bash, perl, Rust etc. more »
x86 etc. PCIe/UCIe/CXL memory/DDR/cache coherency coding in C++/python/C/system C/TcL/java/bash/perl Please note, visa sponsorship is NOT available. more »
CDC) techniques, asynchronous design techniques Strong experience with RTL design for ASIC targets Strong programming and scripting skills: MATLAB, Python, C/C++, Perl, Tcl Good experience in EDA tools such as simulators (e.g. Questa), lint checkers (e.g. Spyglass), synthesis (e.g. Design Compiler), FPGA tools (e.g. Vivado) Good experience in more »
and structured approach to problem-solving. RTL skills in Verilog or VHDL Use of a UNIX environment and shell programming/scripting in e.g. Tcl, Perl, Python etc Programming languages such as: assembly language (ideally Arm assembler), higher-level (e.g. C), object orientated (e.g. C++) Would it not be amazing more »
Expert in Logic Synthesis, Design for Test, Static Timing/Power Analysis, Formal Equivalence Checking and Linting Strong experience with Python/Perl/TCL Strong Leadership skills combined with demonstratable contributions to a successful team environment. Efficient and proactive communication skills within a multi-site and multi-cultural environment. more »
/power/low-power constraints formal FPGA design and validation ARM IPs, protocols - AMBA/AXI/designs Scripting and automation languages like TCL, Python and C/C++ Middle-end design experienceIf you'd like to know more, please apply by sending your CV. more »
knowledge of on-chip bus protocol (AMBA AHB, APB, AXI-Stream, etc). Experience with Linux OS, revision control (Git) and scripting languages (Bash, Tcl, and Python). Experience with EDA tools for simulation (Siemens Quest), Synthesis (DesignCompiler). Salary and Benefits: Up to £100K salary DOE. Travel opportunities. Private more »
Cambridge, Cambridgeshire, East Anglia, United Kingdom
Langham Recruitment Limited
knowledge of on-chip bus protocol (AMBA AHB, APB, AXI-Stream, etc). Experience with Linux OS, revision control (Git) and scripting languages (Bash, Tcl, and Python). Experience with EDA tools for simulation (Siemens Quest), Synthesis (DesignCompiler). Salary and Benefits: Up to £100K salary DOE. Travel opportunities. Private more »
logic libraries and manufacturing process Good knowledge of VHDL or Verilog or System-Verilog language Basic knowledge of programming and scripting languages like C++, TCL, bash, Perl Good experience of translating design requirements into RTL description Experience of digital or mixed-signal verification activities, testbench and verification planning, regression tests more »
knowledge of state-of-the-art SoC design flows (Cadence/Synopsys/Siemens-Mentor) Good programming skills in scripting languages like Python, Perl, Tcl Expertise in binary arithmetic and HW implementation of DSP algorithms Application knowledge in optical communication systems would be a plus Expertise in verification methodologies & tools more »
power/high-performance analog circuits (voltage/current references, oscillators, PLLs, FLLs), experience in system and behavioral modelling and of scripting languages such Tcl, Perl, Python. An understanding, appreciation for audio and/or power management engineering is highly desired. Masters or PhD qualified in Electronic Engineering or Microelectronics more »
power/high-performance analog circuits (voltage/current references, oscillators, PLLs, FLLs), experience in system and behavioral modelling and of scripting languages such Tcl, Perl, Python. An understanding, appreciation for audio and/or power management engineering is highly desired. Masters or PhD qualified in Electronic Engineering or Microelectronics more »
Farnborough, Hampshire, South East, United Kingdom
Hays
28nm or below) process technologies Industry standard design processes for deep sub-micron designs Problem-solving and analytical skills Practical use of scripting languages Tcl/Python/Perl etc Experience of at least one of the following EDA tool flows: Cadence or Synopsys Communicating with other design teams, 3rd more »
in VHDL (or Verilog), CAD flows and tools specific to ASICs (modeling, design, simulation, synthesis, verification, etc.) Knowledge of C/C++ Scripting languages - Tcl, Perl, Python Optimization of architectures and microarchitectures at the HW/RTL levelAlthough not essential any experience in Front-End design for ASIC in the more »
Farnborough, Hampshire, South East, United Kingdom
Hays
functional validation. Tester ATE (Automatic Test Equipment) House Support: Problem-Solving and Analytical Skills: Scripting Languages Proficiency: Practical use of scripting languages such as Tcl, Python, and Perl to enhance workflows. Deep Knowledge of EDA Tool Flows: Effective Communication: The ability to collaborate with other design teams, 3rd party IP more »
of hands-on experience in digital IC verification You have solid knowledge of a digital hardware description languages (VHDL or Verilog) and scripting languages (TCL, Perl, Python) You have solid knowledge of System Verilog and UVM methodology & processes Experience in formal verification & gate-level simulations are a plus A previous more »
Oxford, Oxfordshire, South East Hybrid / WFH Options
IC Resources
and UVM test benches Creation of UVM test benches System Verilog assertions Managing regression and debugging failures Scripting languages (e.g. Perl/Python/TCL) As this is a Senior role, team leadership skills will be welcomed and there could be an opportunity to take on more of a ‘lead more »
Oxfordshire, England, United Kingdom Hybrid / WFH Options
IC Resources
and UVM test benches Creation of UVM test benches System Verilog assertions Managing regression and debugging failures Scripting languages (e.g. Perl/Python/TCL) As this is a Senior role, team leadership skills will be welcomed and there could be an opportunity to take on more of a ‘lead more »
Greater Bristol Area, United Kingdom Hybrid / WFH Options
IC Resources
architectures from concept; Familiarity with CAD/EDA tools for Design and Simulation; Working knowledge in scripting languages for verification environments (e.g Python, Perl, TCL would be preferred); Strong background in Digital Logic Design and Verification; As a top company you can expect ongoing training and support, flexible working conditions more »
to develop FPGA firmware for new product Software languages, C (or C++) is preferable, additional languages considered) Knowledge of one or more of Bash, TCL, or Python. Expertise in Digital Signal Processing (DSP) Work on product developments to optimize and add new functionalities Support the Embedded Software team and the more »
techniques Strong knowledge of FPGA tool flows (synthesis, partitioning, place&route, timing analysis) Excellent skills in SystemVerilog/Verilog/VHDL Experience in scripting (tcl preferable) and Python programming Experience using Questa, ModelSim, GHDL, Verilator, cocotb Experience using Quartus/Vivado/Vitis Experience in High Level Synthesis (HLS) Experience more »
and diverse team, and developing the environment. Must-have experience: Circa 5+ years' experience in FPGA development VHDL/SystemVerilog RTL design/coding Tcl/Python or similar coding/scripting (Nice-to-have experience): UVM verification embedded software/firmware DevOps/software automation/CI/CD more »
Background Requirements: Knowledge/experience with HDL (SystemVerilog/Verilog/VHDL), particularly for testbenches creation Knowledge/experience in scripting languages, such as Tcl and Python Some knowledge of ASIC design flow and related verification step Nice to have: Some experience in digital RTL design Knowledge of UVM environments more »
