5 of 5 ASIC Design Engineer Jobs in Cambridgeshire

ASIC Design Engineer Cambridge Senior OR Principal Engineering level I am seeking an experienced ASIC Design Engineer to join an innovative HW team. The work of the whole ASIC team includes Architecture, considering software/hardware trade-offs, RTL design, Verification at … as implementation including DFT, synthesis, place and route, timing closure, and sign-off checks. Due to growth, the company are expanding and seeking an ASIC Design Engineer to join an already talented group of Engineers. They are looking to expand the team in Cambridge with this role … and are seeking an Engineer with working autonomously. Responsibilities Design, IP integration, and verification planning and execution. Specifying and/or configuring designs. Working closely with verification teams to develop plans and execute block-level and chip-level verification. Assisting the implementation team with constraints development and timing More ❯

ASIC Design Engineer Cambridge Senior OR Principal Engineering level I am seeking an experienced ASIC Design Engineer to join an innovative HW team. The work of the whole ASIC team includes Architecture, considering software/hardware trade-offs, RTL design, Verification at … as implementation including DFT, synthesis, place and route, timing closure, and sign-off checks. Due to growth, the company are expanding and seeking an ASIC Design Engineer to join an already talented group of Engineers. They are looking to expand the team in Cambridge with this role … and are seeking an Engineer with working autonomously. Responsibilities Design, IP integration, and verification planning and execution. Specifying and/or configuring designs. Working closely with verification teams to develop plans and execute block-level and chip-level verification. Assisting the implementation team with constraints development and timing More ❯

ASIC Design LEAD Cambridge Global Semiconductor leader – 5 days onsite Salary + Bonus + RSUs I am seeking an ASIC Design Lead to join a leading player in Cambridge. You will have a deep understanding of digital design and a proven track record in leading … deliverables. Mentor and guide junior engineers, fostering a collaborative and innovative environment. Define high level specifications and micro-architecture for low power IPs. Ensure design quality, RTL acceptance checks, performance and verification closure. Support synthesis and timing closure, including creation of functional ECOs. Support post-silicon bring-up activities. … role you must have: Proven ability to lead teams to deliver complex IP designs, from concept to post-silicon debug. Deep understanding of digital design principles, methodologies and tools. Experience in Verilog/System-Verilog is a must. Knowledge and experience with power analysis at RTL and Gate-Level. More ❯

environment that inspires the cross-fertilization of ideas necessary for true innovation. For more information about Draper, visit www.draper.com. Job Description Summary: A Senior ASIC Hardware Engineer specifies, designs, verifies, tests, and documents Application-Specific Integrated Circuits. The engineer develops the architecture, designs circuits and/or … HDL, performs simulations, performs physical layout, verifies and tests designs. Job Description: Duties/Responsibilities Design and simulate circuits at transistor-level to implement architecture and requirement specifications Contribute to system-level design Optimize hardware designs for performance, power, and cost Evaluate the hardware feasibility of complex algorithms … guide physical layout, including floor-planning, and simulate circuits using extracted parasitics. Perform other duties as assigned Skills/Abilities Proficiency in integrated circuit design Understanding of integrated circuits, semiconductors, and general computer architecture Ability to write detailed design specifications Ability to manage small technical teams Excellent verbal More ❯

#Urgent_Opening_for Canvendor #Hiring : RTL Engineer (12+ Years Experience) | UK | Immediate Joiners Preferred Location: Cambridge, UK or Sophia, France Experience: 12+ Years Domain: Semiconductor/SoC/IP/Subsystem Verification Notice period: Immediate to 30days #Key_Requirements: Able to analyse/define/develop/write micro … Architechture specification for a sub-system Interact with Architect and understand the Module/Sub-system requirement Solid experience in SoC design/Integration aspects Need to be adept in finding design solution at SoC level Able to write glue logic/gasket/bridge modules as required … Experience in working large SoC/Chiplet design . Designs with Multi Clock/Reset/Voltage and Power domain Should be able to own and drive Quality check of the sub-system (CDC, RDC, Lint, DFT Lint) and take to closure Able to review and provide timing constraints More ❯