1 to 25 of 26 SystemVerilog Jobs in Cambridgeshire

Linux and/or Windows development environments . Bonus Experience Xilinx SoC platforms (e.g. Zynq, Versal) Intel (Altera) FPGA architectures, including SoCs Verilog/SystemVerilog Cryptographic algorithms or secure hardware systems Product compliance, certification, or regulated environments Personal Attributes Demonstrates ownership and accountability for technical delivery. Applies a structured approach ...

equivalent industry experience) 3+ years' experience in RTL design Academic or commercial experience in CPU RTL design Strong RTL design skills using Verilog, SystemVerilog, or VHDL A solid software engineering background, including experience with Object‐oriented and functional programming paradigms – C, C++, Python Compiler infrastructures, particularly domain‐specific languages (DSLs ...

equivalent industry experience). 6+ years’ experience in RTL design. Academic or commercial experience in CPU RTL design. Strong RTL design skills using Verilog, SystemVerilog, or VHDL. A solid software engineering background, including experience with: Object‐oriented and functional programming paradigms – C, C++, Python Compiler infrastructures, particularly domain‐specific languages ...

said, they are looking for the best. Senior FPGA Engineer requirements: Minimum 10+ years commercial FPGA Engineering ( Implementation, simulation, verification and test) Coding in SystemVerilog or VHDL FPGA external interface designs (e.g. PCIe, Aurora, Ethernet, SPI etc.) Strong academic background Proactive, collaborative mindset with ownership of projects Resident ...

Automotive market (applying standards such as ISO 26262 and/or IEC 61508) Programming language, such MATLAB, 'C' or C++ Experience with SystemVerilog Assertions (SVA) and Continuous Integration flows In Return You will get to utilise your engineering skills to build multimedia technologies and influence millions of devices for years ...

full design lifecycle, and collaborate with world-class architects to deliver high-performance, power-efficient processor IP. You will apply strong Verilog/SystemVerilog/VHDL skills, software background (C/C++/Python), and DSL experience to drive verification and robust design practices in a cutting-edge environment. #J ...

adjust designs to ensure timing closure - Bring value with experience in Python based verification frameworks, such as cocotb (highly advantageous) Requirements: - Strong knowledge of SystemVerilog - Experience with Python - Proven background in RTL verification - Ability to write and validate timing constraints - Understanding of low power design principles - Experience writing module specifications ...

cross‐functional hardware teams Debug challenging issues spanning RTL, simulation, and hardware platforms What they’re looking for Strong hands‐on expertise in SystemVerilog and UVM Proven debugging skills across RTL, simulation, and hardware Experience owning verification planning and strategy in commercial environments Comfortable operating in fast‐moving environments with ...

collaborate with design teams to define verification plans and build test benches from scratch or with reusable verification components. The role requires experience with SystemVerilog, UVM, and embedded C for Cortex-M class MCUs, and familiarity with PCIe/HDMI/USB/AMBA protocols. On-site work in Cambridge ...

leading processor designs and collaborating with top architects and engineers. The role requires 6+ years in RTL design and strong skills in Verilog/SystemVerilog/VHDL, with exposure to verification methods like UVM. #J-18808-Ljbffr ...

architectures Integration of operating system-class subsystems alongside real-time domains A strong appreciation of the practical realities of chip implementation, including RTL design (SystemVerilog), verification methodologies (UVM, formal, emulation/FPGA), DFT, timing closure, power analysis, and physical design constraints Familiarity with scripting languages such as Bash, Python ...

drive development across units, lead architectural investigations, and collaborate with verification, software, and imaging researchers to deliver robust hardware solutions. Ideal candidates have strong SystemVerilog/Verilog/VHDL skills, UNIX scripting experience, and prior leadership capabilities for senior roles. #J-18808-Ljbffr ...

remote and occasional onsite support to VIP users in Arm offices across the world as and when required Required Skills & Experience: Experience of using SystemVerilog and UVM with sound understanding of object-oriented design, data structures and algorithms Experience of IP and SoC verification with deep knowledge of verification processes ...

development for large scale, high performance silicon projects. Proven success leading and developing technical teams in a semiconductor environment. Deep expertise in SystemVerilog or VHDL and familiarity with modern digital design flows. Strong ability to diagnose and resolve complex design issues, including via scripting/programming (Python, Tcl, etc.). ...

Join us at Entrust. From our comprehensive portfolio of solutions to our flexible, global workplace, we empower careers, foster collaboration, and build solutions that help keep the world moving safely. Position Overview Provides technical leadership ...

General Summary Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP, and performing pre- and post-silicon verification to verify correctness and ensure performance and power ...

senior level engineers. This award-winning Technology company seeks a Degree qualified FPGA Design Engineer with SoC design and Integration skills, RTL Verification experience (SystemVerilog, VHDL) and Python knowledge. In this role the successful Digital FPGA Design Engineer will work closely with hardware, software and mechanical engineers to bring exciting … Engineering or related discipline. Proven commercial FPGA Design experience. SoC design and Integration experience. Python knowledge ideally with exposure to cocotb. RTL Verification experience (SystemVerilog, VHDL). Experience writing timing constraints and ensuring these are met. Designing for low power. To find out more, please apply in confidence now. ...

from scratch or using shared verification components. Qualifications Hands-on experience with at least three projects. Experience of creating test benches from scratch, using SystemVerilog, Python, or UVM. Experience of writing embedded C, ideally for Cortex-M class MCUs. Good technical understanding in at least one complex IP protocol (e.g. … PCIe, HDMI, USB, SDIO, AMBA bus architectures). Ability to write functional coverage and SystemVerilog Assertions (SVA). Good understanding of design/front-end processes. Experience with low-power simulations. SoC verification concepts: memory caches, DMA, security architecture (TrustZone or equivalent). Experience with Cadence simulation tool flow including ...

Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi‐chiplet systems Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards Collaborate with software teams to define and implement configurable testbenches Work with design teams test plans … Engineering or Computer Science 6+ years and current hands‐on experience in block‐level/IP‐level/SoC‐level verification Proficiency in Verilog, SystemVerilog Familiarity with industry‐standard EDA tools for simulation and debug Deep experience with UVM‐based testbenches Experience with modern programming languages like Python Knowledge ...

Job Description As a CPU Microarchitecture/RTL design engineer at SiFive, you will be part of a team of engineers who are passionate about designing industry-leading CPU cores, based on the revolutionary open ...

About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive ...

Lead the creation and verification of reusable RTL components A well-established company is seeking an RTL Design Architect with strong expertise in verification and good management skills to join their Cambridge-based development team. ...

work alongside experienced engineers, helping to develop robust verification environments while gaining exposure to production silicon and advanced verification methodologies. Responsibilities Develop and debug SystemVerilog/UVM testbenches. Create and execute verification plans, tests, and coverage. Debug simulation failures and support regression testing. Contribute to verification infrastructure and automation. Collaborate … quality silicon. Participate in code reviews and contribute to open-source projects. Requirements Essential 15 years' industry experience in Digital Design Verification. Experience with SystemVerilog and UVM. Understanding of verification methodologies and constrained-random verification. Experience writing testbenches and debugging RTL. Programming experience in Python and/or C. Familiarity ...

work alongside experienced engineers, helping to develop robust verification environments while gaining exposure to production silicon and advanced verification methodologies. Responsibilities Develop and debug SystemVerilog/UVM testbenches. Create and execute verification plans, tests, and coverage. Debug simulation failures and support regression testing. Contribute to verification infrastructure and automation. Collaborate … quality silicon. Participate in code reviews and contribute to open-source projects. Requirements Essential 15 years' industry experience in Digital Design Verification. Experience with SystemVerilog and UVM. Understanding of verification methodologies and constrained-random verification. Experience writing testbenches and debugging RTL. Programming experience in Python and/or C. Familiarity ...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next‐generation computing experiences—from AI and data centers to PCs, gaming and embedded systems. Grounded in ...