1 to 25 of 28 ASIC Jobs in Cambridge

you will also guide and support team members and contribute to improving design methodologies. Required Skills and Experience: Experience in RTL design for complex ASIC products & SoCs using Verilog and/or SystemVerilog Experience with Arm-based designs and/or Arm System Architectures Knowledge of Functional Safety concepts and More ❯

architecture and programming guides. Ownership of complete work package from specification through to delivery. Cross functional collaboration with Firmware, Systems and Verification teams. Running ASIC development tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation More ❯

profilers, compilers, etc. Design scalable and verifiable systems Write code that is correct and performant Work with both user-level software and FPGA/ASIC hardware systems You do not need a background in quantum computing! You will learn this along the way... What we need Track record of bringup More ❯

profilers, compilers, etc. Design scalable and verifiable systems Write code that is correct and performant Work with both user-level software and FPGA/ASIC hardware systems You do not need a background in quantum computing! You will learn this along the way... What We Need Track record of bringup More ❯

engineers in the team What we need Significant commercial experience with a variety of functional processor verification methodologies as applied to CPU or other ASIC verification (simulators, test generation, coverage collection, gate level simulation etc ) Knowledge of verifying CPU architectures or other complex IP (e.g. GPUs, NNAs) Fluency and the More ❯

planning skills Motivated, self-starting, and collaborative Ability to troubleshoot complex issues across teams and languages Experience with verification in CPU and/or ASIC environments Knowledge of SystemVerilog, Python, C++, Linux, UVM, SVA, Assembly, LLVM, GCC, Git, SGE or other DRS Familiarity with XML, XPath/XSLT We offer More ❯

or equivalent) in Electronics or Computer Engineering with significant experience in digital design & functional verification. A strong understanding of design and verification concepts in ASIC & FPGA flows. You will have proven expertise in some of the following areas: Experience with simulation and debug tools, with understanding of how to configure More ❯

where you can share your ideas and feedback with everyone. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : Formal Verification Engineer Location : Cambridge Salary : £30-70k + benefits Key Skills : ASIC/FPGA verification, Verilog, VHDL, RTL More ❯

documented and shared with internal cross functional teams working on similar products. The Engineer will be responsible for automation for development and validation of ASIC products generating Python test scripts, writing embedded C code for FW radio control, supporting the business group with radio training materials and investigating customer issues More ❯

Engineering, Computer Engineering, or a related field Strong understanding of hardware verification methodologies and tools Experience with UVM (Universal Verification Methodology) for FPGA/ASIC verification Familiarity with security features and protocols, such as CHERI, is a plus Excellent communication skills and the ability to work effectively in a collaborative More ❯

experience with AI/ML, Rich OS or Multimedia applications very desirable Good knowledge of CPU architecture principles and SoC design principles Knowledge of ASIC/SoC design processes In Return: We offer you the opportunity to join a fast-paced team and work with some of the leading tech More ❯

Key requirements include: A good degree in Computer Engineering or related field (MSc minimum) A number of years’ solid hands-on experience within Digital ASIC Design and CPU development In-depth knowledge of CPU instruction set architecture and CPU cores Experience within software development and modelling in C Excellent communication More ❯

in RTL design at IP or SoC level. Proficiency in optimizing circuit designs and balancing key trade-offs for performance metrics. Expertise in ASIC or FPGA design tools and environments. Familiarity with writing assertions and creating coverage bins for verification. Strong analytical skills, responsibility, and problem-solving capabilities. You … tools such as UVM or formal verification methodologies. Knowledge of CPU, DSP, or FPU architectures and debugging/testing strategies. Hands-on experience with ASIC, FPGA, and physical design tools (P&R). Proficiency in SystemVerilog, C, SystemC, C++, Python, Perl, or TCL. Knowledge of place and route methodologies. Strong More ❯

technical expertise, leadership qualities, and a commitment to excellence. Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification … validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Key Responsibilities: In partnership with system and architecture teams, drive the specification, development and delivery of digital IP blocks to multiple projects. Drive More ❯

Raspberry Pi is seeking an experienced Digital IC Design Engineer to join our innovative ASIC team. The role is based on site in Cambridge with an expectation that the successful candidate comes into the office on a full time basis. The work of the whole ASIC team includes: Architecture, considering … and verification Familiarity with scripting languages (Bash, Python, Tcl, etc) The following would also be useful: Experience of Cadence simulation tool flow Experience with ASIC/FPGA synthesis and implementation, embedded systems, DFT architecture and insertion, software development, scripting More ❯

ASIC Design Engineer Cambridge Senior OR Principal Engineering level I am seeking an experienced ASIC Design Engineer to join an innovative HW team. The work of the whole ASIC team includes Architecture, considering software/hardware trade-offs, RTL design, Verification at block and system level, FPGA platforms for software … as implementation including DFT, synthesis, place and route, timing closure, and sign-off checks. Due to growth, the company are expanding and seeking an ASIC Design Engineer to join an already talented group of Engineers. They are looking to expand the team in Cambridge with this role and are seeking More ❯

environment that inspires the cross-fertilization of ideas necessary for true innovation. For more information about Draper, visit www.draper.com. Job Description Summary: A Senior ASIC Hardware Engineer specifies, designs, verifies, tests, and documents Application-Specific Integrated Circuits. The engineer develops the architecture, designs circuits and/or … bachelor's degree, or 3-5 years of experience with a master's degree, or 0-2 years of experience with a PhD in ASIC Hardware Engineering or related. Additional Job Description: Applicants should possess solid skills in front-end digital systems design with experience in design flows from Cadence More ❯

three ways: Enabling Customers, Transforming Industries and Enriching Lives. Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification More ❯

requirements and to take the design through to production. Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification … validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. What We Would Like To See: 5 or more years of industrial experiences in analogue/RF IC design with experience in one More ❯

synthesis, power reduction, timing convergence, and floorplan efforts. PREFERRED EXPERIENCE: Verilog RTL development with industry tools in a CPU or GPU or SOC or ASIC environment Demonstrates expertise in the following: Processor architecture Logic design RTL coding experience for a high-speed processors Power-saving techniques Exposure to physical design … synthesis, power reduction, timing convergence, and floorplan efforts. PREFERRED EXPERIENCE: Verilog RTL development with industry tools in a CPU or GPU or SOC or ASIC environment Demonstrates expertise in the following: Processor architecture Logic design RTL coding experience for a high-speed processors Power-saving techniques Exposure to physical design More ❯

years’ experience – Mid- Senior level I am seeking a DFT Engineer to join a UK-headquartered fabless semiconductor company specializing in custom ASIC design and supply services . Known for working across a broad range of sectors — including automotive, industrial, healthcare, communications, and consumer electronics — the company provides both turnkey … ASIC development and IP licensing , including processor subsystems and signal processing solutions. You will have a strong academic record and 5-10 years’ experience in Design for Test (DFT) within digital ASIC/SoC development. Responsibilities Take full-flow ownership of all DFT, BIST, and test-pattern generation for complex … digital and mixed-signal ASIC designs on an as-needed basis to meet customer project requirements. Setup, run, and maintain EDA tool flows relating to DFT, BIST, and test pattern generation. Work closely alongside the wider Front-end and Back-end teams to implement and verify DFT at all stages More ❯

more information about Draper, visit www.draper.com. Job Description Summary: We are seeking a talented and motivated individual to join the analog mixed signal (AMS) ASIC team at Draper. The physical silicon design group is responsible for creating complex analog layouts from schematics in collaboration with other members of our incredible … While we are seeking a principal level engineer, considerations will be made at all levels for particularly capable applicants. A successful candidate will assist ASIC development through creating custom analog layouts, floor planning entire chips, high level problem solving, and executing tape outs. Skills with organizing and leading other layout … Experience Requires 7-10 years of experience with a bachelor's degree, or 5-10 years of experience with a master's degree in ASIC Hardware Engineering or related. Preferred Qualifications: Experience with low power circuit design Experience with CMOS advanced nodes below 32nm Experience with radiation-hardened electronics More ❯

Engineers and Architects collaborate across functional teams to meet and exceed system-level requirements. This is a great opportunity to join a fast-paced ASIC Design and System Architecture team responsible for the development of next-generation, high performance, low-power ASIC designs for mobile, automotive, compute, IoT and XR More ❯

need Experience with state-of-the-art FPGA platforms (e.g. AMD/Xilinx MPSoCs/RFSoCs, Altera Stratix 7 or Stratix 10) Experience with ASIC environments ( Proven professional experience in at least one of the following areas: Customisation of RISC-V CPUs e.g. addition of new instructions and associated hardware … accelerators; Implementation of modern classical decoders on FPGA/ASIC e.g. LDPC, turbo-codes; Architecture of System on Chip solutions with at least one CPU and custom accelerators Proven capability to test, debug and improve complex systems Ability to convert product requirements into technical specifications to document and share your More ❯

that inspires the cross-fertilization of ideas necessary for true innovation. For more information about Draper, visit www.draper.com. Job Description Summary: Draper's Digital ASIC Implementation Team is seeking a motivated and experienced Principal Hardware Engineer to perform logic optimization, DFT insertion, physical layout, static timing analysis, timing closure and … Experience Requires 7-10 years of experience with a bachelor's degree, or 5-10 years of experience with a master's degree in ASIC Hardware Engineering or related. Preferred Qualifications: Experience with low power circuit design Experience with CMOS advanced nodes below 32nm Experience with radiation-hardened electronics More ❯