2 of 2 ASIC Jobs in the City of London

Senior Design Verification Engineer (FPGA/ASIC) My client, an HFT firm, is seeking a Senior Design Verification Engineer to work on high-performance FPGA and ASIC systems used in ultra-low-latency, real-time environments. Key responsibilities: Develop testbenches, tests, and verification environments for FPGA/ASIC designs Create … Manage test suites, coverage, and CI infrastructure Contribute to internal tools and open-source verification projects Key requirements: 3+ years’ experience in FPGA or ASIC functional verification Strong SystemVerilog skills (UVM or similar frameworks) Experience with functional and code coverage Proficiency in Python ; C++ a plus Comfortable working ...

Overview: My client is a global tech firm seeking an FPGA/ASIC Hardware Engineer to design high-performance, low-latency compute systems. You’ll design RTL in SystemVerilog, optimise data pipelines, and work on advanced hardware platforms in a hands-on, performance-focused role—no industry background required. … responsibilities: Design and develop FPGA and/or ASIC solutions as part of a cross-functional engineering team Implement and optimise RTL for complex data structures and processing pipelines Explore and evaluate new tools, technologies, and architectures Contribute to a fast-moving, modern hardware development environment Key requirements: 4+ years ...