1 to 25 of 44 ASIC Jobs in London

Company Overview Flux Computing designs and manufactures optical processors to train and run inference on large AI models. Join us in London to be part of a highly motivated and skilled team that thrives on delivering impact and innovation at More ❯

FPGA/ASIC Design: My client is a renowned HPC research-led hardware team that values true engineering expertise and places great emphasis on problem-solving, critical thought, and versatility. The FPGA team collaborates closely with traders and software engineers to identify key challenges and develop effective solutions to issues that occur in sub microsecond trading. At their core, my More ❯

FPGA/ASIC Design: My client is a renowned HPC research-led hardware team that values true engineering expertise and places great emphasis on problem-solving, critical thought, and versatility. The FPGA team collaborates closely with traders and software engineers to identify key challenges and develop effective solutions to issues that occur in sub microsecond trading. At their core, my More ❯

and industry-standard methodologies. Proven experience with RTL design (IP or SoC level). Proficiency in performance optimisation, including power, area, and frequency trade-offs. Hands-on experience with ASIC design tools (e.g., Synopsys, Cadence, etc.). Desirable Experience Understanding of verification methodologies such as UVM or formal verification. Exposure to GPU, CPU, DSP, or FPU architecture and debug/ More ❯

and industry-standard methodologies. Proven experience with RTL design (IP or SoC level). Proficiency in performance optimisation, including power, area, and frequency trade-offs. Hands-on experience with ASIC design tools (e.g., Synopsys, Cadence, etc.). Desirable Experience Understanding of verification methodologies such as UVM or formal verification. Exposure to GPU, CPU, DSP, or FPU architecture and debug/ More ❯

A skilled communicator and collaborator, you thrive in a fast-paced, innovative environment. Required Skills: Expertise in digital IC design and RTL at IP or SoC level. Proficiency in ASIC/FPGA design tools and optimization techniques. Strong analytical and problem-solving abilities. Preferred Skills: Experience with verification methodologies (UVM, assertions, formal verification). Knowledge of CPU/GPU/ More ❯

A skilled communicator and collaborator, you thrive in a fast-paced, innovative environment. Required Skills: Expertise in digital IC design and RTL at IP or SoC level. Proficiency in ASIC/FPGA design tools and optimization techniques. Strong analytical and problem-solving abilities. Preferred Skills: Experience with verification methodologies (UVM, assertions, formal verification). Knowledge of CPU/GPU/ More ❯

A skilled communicator and collaborator, you thrive in a fast-paced, innovative environment. Required Skills: Expertise in digital IC design and RTL at IP or SoC level. Proficiency in ASIC/FPGA design tools and optimization techniques. Strong analytical and problem-solving abilities. Preferred Skills: Experience with verification methodologies (UVM, assertions, formal verification). Knowledge of CPU/GPU/ More ❯

A skilled communicator and collaborator, you thrive in a fast-paced, innovative environment. Required Skills: Expertise in digital IC design and RTL at IP or SoC level. Proficiency in ASIC/FPGA design tools and optimization techniques. Strong analytical and problem-solving abilities. Preferred Skills: Experience with verification methodologies (UVM, assertions, formal verification). Knowledge of CPU/GPU/ More ❯

throughput and capacity of emerging FPGA technologies. Work closely with cross-functional teams, including Quantitative Research, Engineering, and Traders. Skill Set Requirements: Minimum 2 years experience in the full ASIC or FPGA design life cycle, including hardware architecture, RTL coding, simulation, verification, system integration, and testing. Experience working in Verilog, System Verilog, and either Python or C++. Strong working knowledge More ❯

us in London to be part of a highly motivated and skilled team that thrives on delivering impact and innovation at speed. The role We’re searching for a ASIC Lead (Digital) who can drive a complex, high‐speed mixed‐signal chip from concept to mass production while line‐managing and mentoring a world‐class team of design engineers. You … serve as the principal technical authority for every digital block that underpins our OTPU. Responsibilities Architect, plan and deliver the digital top level of a multi‐lane optical compute ASIC—RTL, synthesis, DFT/DFD, static‐timing and physical implementation. Lead cross‐functional teams (digital, analog, verification, layout, packaging, test, firmware) through all silicon lifecycle stages: architecture ► spec ► RTL ► physical … monitoring, calibration engines and field‐update hooks. Encourage a culture of continuous improvement —methodology automation, design‐flow enhancements, documentation and knowledge sharing. Skills & Experience 12 + years of digital ASIC development, with at least 3 full product cycles taken from specification through volume production. Demonstrated success leading a digital team that delivered high speed ASICs containing high‐speed mixed‐signal More ❯

us in London to be part of a highly motivated and skilled team that thrives on delivering impact and innovation at speed. The role We’re searching for a ASIC Lead (Digital) who can drive a complex, high‐speed mixed‐signal chip from concept to mass production while line‐managing and mentoring a world‐class team of design engineers. You … serve as the principal technical authority for every digital block that underpins our OTPU. Responsibilities Architect, plan and deliver the digital top level of a multi‐lane optical compute ASIC—RTL, synthesis, DFT/DFD, static‐timing and physical implementation. Lead cross‐functional teams (digital, analog, verification, layout, packaging, test, firmware) through all silicon lifecycle stages: architecture ► spec ► RTL ► physical … monitoring, calibration engines and field‐update hooks. Encourage a culture of continuous improvement —methodology automation, design‐flow enhancements, documentation and knowledge sharing. Skills & Experience 12 + years of digital ASIC development, with at least 3 full product cycles taken from specification through volume production. Demonstrated success leading a digital team that delivered high speed ASICs containing high‐speed mixed‐signal More ❯

us in London to be part of a highly motivated and skilled team that thrives on delivering impact and innovation at speed. The role We’re searching for a ASIC Lead (Digital) who can drive a complex, high‐speed mixed‐signal chip from concept to mass production while line‐managing and mentoring a world‐class team of design engineers. You … serve as the principal technical authority for every digital block that underpins our OTPU. Responsibilities Architect, plan and deliver the digital top level of a multi‐lane optical compute ASIC—RTL, synthesis, DFT/DFD, static‐timing and physical implementation. Lead cross‐functional teams (digital, analog, verification, layout, packaging, test, firmware) through all silicon lifecycle stages: architecture ► spec ► RTL ► physical … monitoring, calibration engines and field‐update hooks. Encourage a culture of continuous improvement —methodology automation, design‐flow enhancements, documentation and knowledge sharing. Skills & Experience 12 + years of digital ASIC development, with at least 3 full product cycles taken from specification through volume production. Demonstrated success leading a digital team that delivered high speed ASICs containing high‐speed mixed‐signal More ❯

automation and proficiency in at least one programming language (C++, Python, TCL etc.). Minimum Qualifications: Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work More ❯

The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technology to drive low latency trading decisions on global markets. We build custom solutions across the spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators. These high performance designs require even higher performance verification. We are looking for … rethink, redesign, and surpass the status quo. For example, members of our team are active maintainers of popular open source projects such as Slang, Verilator, and Cocotb. FPGA and ASIC verification is part of an innovative, growing team at HRT which is integral to the success of our trading. You can expect to always be challenged by the ever-changing … and continuous integration infrastructure Developing and improving open-source and internal tools Qualifications Superb debug and analytical skills Professional experience (2+ years) in RTL functional verification for FPGA or ASIC Experience with code and functional coverage collection/analysis Experience with SystemVerilog and industry-standard frameworks such as UVM Experience with Python Comfortable in a Linux environment Familiarity with Verilator More ❯

formal verification, emulation, coverage‐driven flows, RISC‐V vectors, and AI‐centric design techniques to keep Flux at the forefront of silicon quality. Skills & Experience 3+ years in digital ASIC/SoC design & verification, with at least two tape‐outs. Mastery of SystemVerilog/UVM, functional coverage, constraint‐random stimulus and scoreboards. Deep understanding of clock‐domain crossing, reset and More ❯

formal verification, emulation, coverage‐driven flows, RISC‐V vectors, and AI‐centric design techniques to keep Flux at the forefront of silicon quality. Skills & Experience 3+ years in digital ASIC/SoC design & verification, with at least two tape‐outs. Mastery of SystemVerilog/UVM, functional coverage, constraint‐random stimulus and scoreboards. Deep understanding of clock‐domain crossing, reset and More ❯

formal verification, emulation, coverage‐driven flows, RISC‐V vectors, and AI‐centric design techniques to keep Flux at the forefront of silicon quality. Skills & Experience 3+ years in digital ASIC/SoC design & verification, with at least two tape‐outs. Mastery of SystemVerilog/UVM, functional coverage, constraint‐random stimulus and scoreboards. Deep understanding of clock‐domain crossing, reset and More ❯

ASIC Design Engineer London/Remote Experience Level: 3–5 years I am looking for a talented and motivated Hardware Design Engineer to join a UK based HW team. They are a leading global provider of high-performance IP and custom silicon solutions; this company is recognized for its deep expertise in advanced process technologies and interface IP. You will … Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL. Familiar with ASIC design flow and tools. Experience with GPU design or computer graphics architecture. Familiarity with high-speed interfaces and memory subsystems. Familiarity with modern graphics. You must have full UK working More ❯

ASIC Design Engineer London/Remote Experience Level: 3–5 years I am looking for a talented and motivated Hardware Design Engineer to join a UK based HW team. They are a leading global provider of high-performance IP and custom silicon solutions; this company is recognized for its deep expertise in advanced process technologies and interface IP. You will … Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL. Familiar with ASIC design flow and tools. Experience with GPU design or computer graphics architecture. Familiarity with high-speed interfaces and memory subsystems. Familiarity with modern graphics. You must have full UK working More ❯

Swedium Global Services is a growing System Engineering and Solution Company, offering services like Semiconductor Engineering R&D Services, Embedded Systems Development, Custom Application Software Development, Web and Cloud Application Development, Testing Services, Consultancy, and Outsourcing services to More ❯

ROLE:ASIC/FPGA Engineer LOCATION: North London, UK (Hybrid Preferred Remote Considered) CONTRACT:Long-Term Contract Outside IR35 HOURLY: Negotiable About the company: A cutting-edge technology company is developing innovative silicon IP solutions that intersect compute, graphics, AI, communications, memory, and security. These IPs will power future technologies across a wide range of high-impact applications. Our client … is expanding there engineering teams and are currently seeking multiple ASIC/FPGA Engineers, from intermediate level to senior architects, to join our world-class teams based in the UK. This is a long-term contract role, based in Hemel Hempstead, with hybrid working preferred. However, fully remote work can be considered for the right candidate. What you will be … the design and development of next-generation silicon IP, collaborating with experienced engineers across global teams. The work is varied, impactful, and at the forefront of technology innovation in ASIC and SoC design. We are looking for engineers with proven experience in several of the following areas: •Computer architectures (ARM or RISC-V) •FPGA Development •VHDL/Verilog •SystemVerilog •UVM More ❯

linting + Complete projects from conception to completion Skills Required: + Experience with frontend RTL Design + Strong Experience with SystemVerilog, Verilog or VHDL + Has had exposure to ASIC design flow (Lint, syntheisis, simulation) + Digital Design Principles experience pipelining, clock domain crossing Further Details: This role offers remote working with a potential visit into the office every month. More ❯

functional teams, including logic design, verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability. Key Responsibilities: Drive the physical implementation of ASIC/SoC designs, including floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off. Work on synthesis, timing analysis (STA), and optimisation to achieve the best PPA metrics. Perform power More ❯

people management experience Our projects generally fit in the following technical areas, experience in any of the following technical domains is advantageous: Commercial, optimised, multiplatform software/FPGA/ASIC development (specifically of our codecs) Mobile and desktop application development Cloud based transcoding platforms Video or data compression knowledge/experience. Project management qualification such as PRICNE2, PMP, APM More ❯