2 of 2 CPLD Jobs in Edinburgh

testbenches. Senior roles may include mentoring of less experienced colleagues. Responsibilities Experience of the following; Designing FPGA architectures from a technical specification Design with Xilinx and Intel FPGA and CPLD devices Using VHDL/Verilog HDL languages for FPGA design Implementing high speed, multi-frequency clocking architectures Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA More ❯

roles). Beneficial Skills to have Experience of designing FPGA IP cores or sub-systems. Designing FPGA architectures from a technical specification. Design with AMD/Intel FPGA and CPLD devices. Using VHDL/Verilog HDL languages for FPGA design. Implementing high speed, multi-frequency clocking architectures. Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA More ❯