21 of 21 Cadence Jobs in the East of England

coding and verification. Proficiency in RTL design techniques, including synthesis, timing closure, and verification. Experience in using UVM for functional verification of ASIC designs. Experience with EDA tools like Cadence and Synopsys for design simulation and verification. Extensive experience with FPGA emulation, design tools, and verification. Contact: For further information please contact Mícheál at Software Placements on More ❯

Nice To Have" Skills and Experience : Experience with SoC-level build and integration flows, including flow optimization and maintenance. Solid understanding of industry-standard EDA tools such as Synopsys, Cadence, and Mentor. Exposure to design databases for storing, managing, and retrieving build logs and verification results. Familiarity with data representation formats such as YAML and JSON, and markup languages More ❯

with cross-functional teams to enable system bring-up, debug, and feature validation on emulation platforms. Support compilation, deployment, and debug flows for emulation systems such as Synopsys ZeBu, Cadence Palladium, and Siemens Strato. Solve simulation/emulation mismatches and system-level test failures. Work closely with EDA vendors to deploy new capabilities, resolve tool issues, and influence future More ❯

with cross-functional teams to enable system bring-up, debug, and feature validation on emulation platforms. Support compilation, deployment, and debug flows for emulation systems such as Synopsys ZeBu, Cadence Palladium, and Siemens Strato. Solve simulation/emulation mismatches and system-level test failures. Work closely with EDA vendors to deploy new capabilities, resolve tool issues, and influence future More ❯

methodologies to improve GPU power, performance and area (PPA). Required Skills and Experience : Experience with hardware description languages (System Verilog preferable). Experience using EDA simulators (Siemens, Synopsys, Cadence) Strong problem solving and debugging skills, and ability to closely collaborate with other teams. Experience working with version control and code review systems such as Git and Gerrit Proficiency More ❯

with EDA tool vendors to troubleshoot tool-related challenges and improve design outcomes. Manage and prioritize your workload to meet project milestones and objectives. Required Experience & Tools: Experience with Cadence tools such as Genus, Innovus, Tempus, QRC, and Conformal. Proficient in physical design flows including synthesis, logical equivalence checking (LEC), floorplanning, placement, clock tree synthesis (CTS), routing, and STA. … Python, or Perl to support project workflows. Keywords: Physical Design, RTL, Place and Route (PnR), Static Timing Analysis (STA), Logical Equivalence Checking (LEC), Low Power Design, Power Gating, DVFS, Cadence Genus, Cadence Innovus, Cadence Tempus, QRC, Conformal, Synopsys Fusion Compiler, Formality, Synthesis, Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing, UPF, Constraint Development, EDA Tools, Automation Scripting, TCL More ❯

with EDA vendors to solve tool issues and advance PPA. Key Requirements: 8+ years of experience within Physical Design, ideally with exposure to low-power design techniques. Experience with Cadence (Genus, Innovus, Tempus, QRC, Conformal) and Synopsys (Fusion Compiler, Formality) tools. Understanding in building flows and methodology using scripting languages such as TCL, Python, Perl to support project development. More ❯

experience in sub-6GHz applications. Proven success in delivering right-first-time silicon. Deep understanding of core design principles including linearity, stability, mismatch, and noise. Hands-on experience with Cadence Virtuoso and version control tools. Working knowledge of EM tools and IC layout techniques. Strong understanding of ESD protection and design for manufacture principles. Excellent time management, communication, and More ❯

experience in sub-6GHz applications. Proven success in delivering right-first-time silicon. Deep understanding of core design principles including linearity, stability, mismatch, and noise. Hands-on experience with Cadence Virtuoso and version control tools. Working knowledge of EM tools and IC layout techniques. Strong understanding of ESD protection and design for manufacture principles. Excellent time management, communication, and More ❯

experience in sub-6GHz applications. Proven success in delivering right-first-time silicon. Deep understanding of core design principles including linearity, stability, mismatch, and noise. Hands-on experience with Cadence Virtuoso and version control tools. Working knowledge of EM tools and IC layout techniques. Strong understanding of ESD protection and design for manufacture principles. Excellent time management, communication, and More ❯

and external teams, facilitating communication between IC and module design functions. Bachelor's or master's degree in electrical engineering, microelectronics, or something similar. Extensive hands-on experience with Cadence design tools; familiarity with ADS Momentum/RF Pro and Mentor Graphics DRC/LVA/PEX is a plus. Deep expertise in RF IC design using various silicon More ❯

simulations and conduct measurements to refine performance Support IC Design planning What we're looking for in a Senior RFIC Design Engineer: Proven RF IC design experience Skilled in Cadence tools LNAs, RF switches, analog block design experience Experience with analog IC design Monte Carlo simulation experience If you would like further information about the Senior RFIC Design Engineer More ❯

technology teams by delivering high-performance RFIC solutions. Design and simulate key RFIC building blocks including amplifiers, mixers, and oscillators. Carry out schematic capture, layout supervision, and verification using Cadence or Synopsys tools. Perform EM simulation and optimisation using tools such as ADS or Momentum. Work with cross-functional teams on block and system-level integration to ensure robust … Skills required for this Senior RFIC Design Engineer job, based in Maldon: Degree in Electronics, RFIC Design, or a related field, with extensive experience in RFIC development. Proficiency in Cadence or Synopsys design environments, including schematic, layout, and verification workflows. Experience with EM simulation tools (e.G., ADS, Momentum) and understanding of RF metrics like gain, NF, linearity, and phase More ❯

technology teams by delivering high-performance RFIC solutions. Design and simulate key RFIC building blocks including amplifiers, mixers, and oscillators. Carry out schematic capture, layout supervision, and verification using Cadence or Synopsys tools. Perform EM simulation and optimisation using tools such as ADS or Momentum. Work with cross-functional teams on block and system-level integration to ensure robust … Skills required for this Senior RFIC Design Engineer job, based in Maldon: Degree in Electronics, RFIC Design, or a related field, with extensive experience in RFIC development. Proficiency in Cadence or Synopsys design environments, including schematic, layout, and verification workflows. Experience with EM simulation tools (e.G., ADS, Momentum) and understanding of RF metrics like gain, NF, linearity, and phase More ❯

Develop precision bias circuits and fractional-N PLLs to support system-level integration. Work with SiGe and CMOS process technologies to achieve optimal analogue performance. Use industry-standard tools (Cadence, Synopsys) for schematic entry, layout supervision, and verification. Collaborate with layout engineers, validation teams, and system architects to ensure successful silicon implementation and debug. Qualifications and Skills required for … Analogue IC Design, or a related field, with extensive experience in IC design. Strong background in analogue circuit design including references, PLLs, and passive/active filters. Experience with Cadence or Synopsys tool suites for design and verification. Familiarity with SiGe and CMOS technology platforms. Good understanding of analogue performance metrics such as linearity, PSRR, and noise. Effective communicator More ❯

Develop precision bias circuits and fractional-N PLLs to support system-level integration. Work with SiGe and CMOS process technologies to achieve optimal analogue performance. Use industry-standard tools (Cadence, Synopsys) for schematic entry, layout supervision, and verification. Collaborate with layout engineers, validation teams, and system architects to ensure successful silicon implementation and debug. Qualifications and Skills required for … Analogue IC Design, or a related field, with extensive experience in IC design. Strong background in analogue circuit design including references, PLLs, and passive/active filters. Experience with Cadence or Synopsys tool suites for design and verification. Familiarity with SiGe and CMOS technology platforms. Good understanding of analogue performance metrics such as linearity, PSRR, and noise. Effective communicator More ❯

Develop precision bias circuits and fractional-N PLLs to support system-level integration. Work with SiGe and CMOS process technologies to achieve optimal analogue performance. Use industry-standard tools (Cadence, Synopsys) for schematic entry, layout supervision, and verification. Collaborate with layout engineers, validation teams, and system architects to ensure successful silicon implementation and debug. Qualifications and Skills required for … Analogue IC Design, or a related field, with extensive experience in IC design. Strong background in analogue circuit design including references, PLLs, and passive/active filters. Experience with Cadence or Synopsys tool suites for design and verification. Familiarity with SiGe and CMOS technology platforms. Good understanding of analogue performance metrics such as linearity, PSRR, and noise. Effective communicator More ❯

Skills & Experience Required: Master's degree or PhD in a closely related field; or proven industrial track record A minimum of five years' experience of IC design Expertise with Cadence Virtuoso tools and version control Silicon experience of SiGe Bipolar and CMOS technologie s Successful track record of right first-time silicon An understanding of design for manufacture Working … knowledge of IC layout techniques in a Cadence Virtuoso environment Familiarisation of ESD protection techniques Due to location candidates must have their own transport Please apply, if you would like to find out more about this role call Julia @ Prime Appointments More ❯

discipline, or equivalent industrial experience. 5+ years of hands-on IC design experience. Strong understanding of analogue and RF design principles including linearity, noise, mismatch, and stability. Expertise in Cadence Virtuoso tools and version control systems. Experience designing in SiGe Bipolar and CMOS processes. Familiarity with IC layout techniques within Cadence Virtuoso. Good understanding of design-for-manufacture More ❯

discipline, or equivalent industrial experience. 5+ years of hands-on IC design experience. Strong understanding of analogue and RF design principles including linearity, noise, mismatch, and stability. Expertise in Cadence Virtuoso tools and version control systems. Experience designing in SiGe Bipolar and CMOS processes. Familiarity with IC layout techniques within Cadence Virtuoso. Good understanding of design-for-manufacture More ❯

discipline, or equivalent industrial experience. 5+ years of hands-on IC design experience. Strong understanding of analogue and RF design principles including linearity, noise, mismatch, and stability. Expertise in Cadence Virtuoso tools and version control systems. Experience designing in SiGe Bipolar and CMOS processes. Familiarity with IC layout techniques within Cadence Virtuoso. Good understanding of design-for-manufacture More ❯