1 to 25 of 31 Cadence Jobs in the South East

experience with RTL design (IP or SoC level). Proficiency in performance optimisation, including power, area, and frequency trade-offs. Hands-on experience with ASIC design tools (e.g., Synopsys, Cadence, etc.). Desirable Experience Understanding of verification methodologies such as UVM or formal verification. Exposure to GPU, CPU, DSP, or FPU architecture and debug/test strategies. Experience with More ❯

experience with RTL design (IP or SoC level). Proficiency in performance optimisation, including power, area, and frequency trade-offs. Hands-on experience with ASIC design tools (e.g., Synopsys, Cadence, etc.). Desirable Experience Understanding of verification methodologies such as UVM or formal verification. Exposure to GPU, CPU, DSP, or FPU architecture and debug/test strategies. Experience with More ❯

Principal Application Engineer (Palladium Emulation) Join or sign in to find your next job Join to apply for the Principal Application Engineer (Palladium Emulation) role at Cadence Principal Application Engineer (Palladium Emulation) 1 week ago Be among the first 25 applicants Join to apply for the Principal Application Engineer (Palladium Emulation) role at Cadence Get AI-powered advice … on this job and more exclusive features. At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware … and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. At Cadence, we hire and develop leaders and innovators who want to make an More ❯

checks (e.g., DRC, LVS, ANTENNA, ERC). Solid understanding of synthesis, floorplanning, placement, CTS, routing, and STA concepts. Experience with physical design tools such as: PnR tools: Synopsys ICC, Cadence EDI, Mentor Olympus Synthesis tools: Synopsys DC, Cadence RC Formal verification tools: Formality, Formalpro Physical verification tools: Mentor Calibre, Synopsys IC Validator Demonstrated ability to solve problems independently More ❯

checks (e.g., DRC, LVS, ANTENNA, ERC). Solid understanding of synthesis, floorplanning, placement, CTS, routing, and STA concepts. Experience with physical design tools such as: PnR tools: Synopsys ICC, Cadence EDI, Mentor Olympus Synthesis tools: Synopsys DC, Cadence RC Formal verification tools: Formality, Formalpro Physical verification tools: Mentor Calibre, Synopsys IC Validator Demonstrated ability to solve problems independently More ❯

independently or as part of a team Able to self-manage projects with little oversight and deliver on-time History of demonstrating numerical and analytical skills Desirable Skills & Experience Cadence OrCAD Knowledge of FPGA design using VHDL Knowledge of PCIe, USB, Image Sensors Knowledge of testing to ISO standards such as ISO 60601, or similar. Experience of working within More ❯

Senior Physical Design Engineer - UK Reading - Cisco Silicon One Join to apply for the Senior Physical Design Engineer - UK Reading - Cisco Silicon One role at Cisco . Role Overview As a Senior Physical Design Engineer within Cisco Silicon One, you More ❯

Social network you want to login/join with: At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The Cadence Compute Systems Group (CSG) develops and licenses IP for system designs. This includes CPUs and high-performance DSPs, DDR and IO controllers, hardware accelerators, and subsystems. Our … complex software for embedded, real-time, and multiprocessor systems. The role also requires good experience in group management, project planning, and quality software development. You will work closely with Cadence R&D engineering, marketing, partners, and customers. Key Responsibilities Recruit, train, and manage a strong team of software developers. Develop reference applications to showcase Cadence IP and subsystems. More ❯

creating and supporting everything required for manufacture including the PCB Footprint and Schematic Symbols. Skills Multilayer PCB design commercial experience. Recent PCB design tool experience of Altium Designer or Cadence OrCAD/Allegro etc. Degree in electronics, electrical engineering or related. PCB signal integrity knowledge, PCB stack-up, impedance control, ESD mitigation and EMC compliance. Design for test and More ❯

Management skills. Desirable: A project management qualification. Additional experience in high-level design teams, especially in DFT architecture. Skills & Experience: Essential: Extensive experience with DFT tools (e.g., Mentor, Synopsys, Cadence) and techniques including: IJTAG/Scan/MBIST/BSD/LBIST/Boundary Scan insertion. ATPG/TC improvements and pattern generation. Pattern simulation (Zdel/SDF) and More ❯

Management skills. Desirable: A project management qualification. Additional experience in high-level design teams, especially in DFT architecture. Skills & Experience: Essential: Extensive experience with DFT tools (e.g., Mentor, Synopsys, Cadence) and techniques including: IJTAG/Scan/MBIST/BSD/LBIST/Boundary Scan insertion. ATPG/TC improvements and pattern generation. Pattern simulation (Zdel/SDF) and More ❯

and how power is delivered efficiently. Deep understanding of how circuit boards are made, including different materials, design standards, and construction methods. Skilled in using design software tools, especially Cadence OrCAD and Altium Good communication skills to help guide other engineers and participate in design reviews. Knowledge of Design for Manufacturability (DFM) Experience with ODB++, Gerber, Fabrication and Assembly More ❯

Deep understanding of all aspects of Physical construction and Integration. Knowledge of Physical Design Verification methodologies (LVS/DRC). Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.). Great teammate, self-learning skills, and ability to work autonomously. Learn More About Us Here: Cisco Silicon One Overview Fortune Article on Cisco Silicon One Calcalist Article More ❯

Qualifications Deep understanding of all aspects of Physical construction and Integration. Knowledge in Physical Design Verification methodology LVS/DRC. Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.). Great teammate, self-learning skills, and ability to work autonomously. , where each person is unique, but together we bring our talents to work as a team and More ❯

Scientific Sales Executive I page is loaded Scientific Sales Executive I Apply locations BRACKNELL time type Full time posted on Posted Yesterday job requisition id R50481 At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than … years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace … industrial and health. OpenEye, Cadence Molecular Sciences – a division of Cadence Design Systems – is an industry leader in computational molecular design through rapid, robust, and scalable software, consulting services, and Orion, the only cloud-native fully integrated software-as-a-service molecular modeling platform. Combining unlimited computation and storage with powerful tools for data sharing, visualization and analysis More ❯

lifecycle processes. • Willingness to engineer safety critical products in an industry that is highly regulated and where engineering vigour in valued. • CAS 703 Q-Pulse 4 Desirable • Knowledge using Cadence OrCAD schematic capture, Allegro PCB Editor, pSpice • Knowledge in documenting designs in preparation for formal qualification/certification • Knowledge with TI Hercules family of safety microcontrollers • Knowledge with NXP More ❯

requirements. You take pride in precision, thrive in collaborative environments, and are motivated by creating technology that truly matters. What You Bring Expertise in PCB design using tools like Cadence Allegro and/or Siemens Xpedition Knowledge of PLM systems such as Teamcenter (desirable) Strong grasp of circuit design principles and best practices in layout and component selection Experience More ❯

Social network you want to login/join with: Principal Application Engineer, Bracknell col-narrow-left Client: Cadence Design Systems, Inc. Location: Job Category: Other - EU work permit required: Yes col-narrow-right Job Reference: 146b05efc632 Job Views: 4 Posted: 18.06.2025 Expiry Date: 02.08.2025 col-wide Job Description: At Cadence, we hire and develop leaders and innovators who … world of technology. Principal Application Engineer This Digital IC design and support role offers an opportunity to work on a variety of digital implementation and support activities associated with Cadence EDA tools for Synthesis, Logical Equivalency Checking (LEC), Design-for-Test (DFT), Place & Route and Static Timing Analysis (STA). You may get involved in design services projects and …/or supporting customers using Cadence tools on their projects in areas such as 5G, IOT, automotive, advanced CPU, wireless, audio, image processing, AI, machine learning etc. This role is ideal for someone with several years of hands on ASIC/IC design experience who is looking for a new challenge in an absorbing customer facing role. This role More ❯

Field Marketing Specialist I (EMEA) Field Marketing Specialist I (EMEA) Apply locations BRACKNELL time type Full time posted on Posted Yesterday job requisition id R49709 At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than … years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace … Reports to: Field Marketing Group Director Job Overview: Are you passionate about creating impactful marketing experiences and building connections that drive business growth? The EMEA Field Marketing team at Cadence is looking for an enthusiastic and forward-thinking Marketing Specialist to join our dynamic team! If you have 2-5 years of experience in marketing communications, particularly in events More ❯

design tools and process design kits for silicon chip design. Requirements include.. A Bachelor’s degree in Electronic Engineering or similar Knowledge of EITHER - Custom IC design flows using Cadence Virtuoso platform OR - Digital IC design flows using Cadence or Synopsys platforms Knowledge of custom and digital design flows Scripting experience in Linux/unix, python, Skill, TCL More ❯

design tools and process design kits for silicon chip design. Requirements include.. A Bachelor’s degree in Electronic Engineering or similar Knowledge of EITHER - Custom IC design flows using Cadence Virtuoso platform OR - Digital IC design flows using Cadence or Synopsys platforms Knowledge of custom and digital design flows Scripting experience in Linux/unix, python, Skill, TCL More ❯

EMEA Academic Network Program Manager - EMEA Academic Network Apply locations: BRACKNELL, BRISTOL, FELDKIRCHEN (Munich) Time type: Full time Posted on: Posted 2 Days Ago Job requisition id: R45983 At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The Cadence Academic Network Team focuses on introducing Intelligent System … Global Academic Ecosystem. We provide easy access to industry-grade Computational Software technologies in the areas of EDA, IP, VLSI, Hardware, RF, System Simulation, Molecular Biology, and more. The Cadence Academic Network focuses on enabling fundamental research, building specialized talent communities, supporting workforce development, and promoting the Cadence brand with the academic population. In this varied role, you … will be expected to: Proactively build strong academic relationships, design programs and solutions to proliferate technology adoption at universities, promote the Cadence brand, and support workforce development for Cadence and Cadence customers by advising and assisting with curriculum design. Develop specialized research communities to advance collaborative research of our technology. Design and implement teaching and research programs More ❯

micro‐bump/flip‐chip escape routing so 100 + channels meet skew and return‐loss targets. Perform parasitic extraction and EM/IR, thermal and electro‐migration analysis (Cadence Quantus/Calibre xRC, Voltus, EMX/HFSS), iterate with circuit designers to close speed, noise and phase‐noise margins. Optimise critical paths for minimal capacitance and series inductance … production CMOS technologies, with multiple tape‐outs that include > 10 GHz analog front‐ends or 56 ‐ 112 Gb/s SerDes/CDR/PLL blocks. Expert user of Cadence Virtuoso custom layout tools plus sign‐off flows (PVS/Calibre DRC‐LVS, Quantus/StarRC, Voltus/RedHawk). Deep understanding of parasitic‐aware matching, device symmetry, shielding More ❯

micro‐bump/flip‐chip escape routing so 100 + channels meet skew and return‐loss targets. Perform parasitic extraction and EM/IR, thermal and electro‐migration analysis (Cadence Quantus/Calibre xRC, Voltus, EMX/HFSS), iterate with circuit designers to close speed, noise and phase‐noise margins. Optimise critical paths for minimal capacitance and series inductance … production CMOS technologies, with multiple tape‐outs that include > 10 GHz analog front‐ends or 56 ‐ 112 Gb/s SerDes/CDR/PLL blocks. Expert user of Cadence Virtuoso custom layout tools plus sign‐off flows (PVS/Calibre DRC‐LVS, Quantus/StarRC, Voltus/RedHawk). Deep understanding of parasitic‐aware matching, device symmetry, shielding More ❯

micro‐bump/flip‐chip escape routing so 100 + channels meet skew and return‐loss targets. Perform parasitic extraction and EM/IR, thermal and electro‐migration analysis (Cadence Quantus/Calibre xRC, Voltus, EMX/HFSS), iterate with circuit designers to close speed, noise and phase‐noise margins. Optimise critical paths for minimal capacitance and series inductance … production CMOS technologies, with multiple tape‐outs that include > 10 GHz analog front‐ends or 56 ‐ 112 Gb/s SerDes/CDR/PLL blocks. Expert user of Cadence Virtuoso custom layout tools plus sign‐off flows (PVS/Calibre DRC‐LVS, Quantus/StarRC, Voltus/RedHawk). Deep understanding of parasitic‐aware matching, device symmetry, shielding More ❯