Reading, Berkshire, South East, United Kingdom Hybrid / WFH Options
Fortis Recruitment Solutions
FPGA implementation Experience with ASIC flows or FPGA-ASIC migration Familiarity with standards/quality in the aerospace/space domain (e.g. radiation mitigation, reliability) Experience with scripting (Python, Tcl, Bash, etc.) for automation and flow integration Knowledge of formal verification, constraint generation, or static analysis tools Experience working in remote/hybrid settings, distributed teams What We Offer Competitive More ❯
Engineers for contracts based in Luton, Bedfordshire. The Firmware Engineer will deliver Firmware for complex digital systems that meet challenging future customer requirements. Responsibilities Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. More ❯
Southampton, Hampshire, South East, United Kingdom Hybrid / WFH Options
Fortis Recruitment Solutions
e.g. error correction, equalisation, beamforming, channel estimation) Familiarity with AMBA bus protocols Practical experience with UVM verification methodologies C++/SystemC experience for modelling and integration Scripting skills (Python, Tcl, Bash) for automation and flows Understanding of project methodologies (agile, waterfall, requirements traceability) Experience with AMD/Xilinx FPGAs and/or ASIC backend EDA flows What We Offer Competitive More ❯
Oxford, England, United Kingdom Hybrid / WFH Options
IC Resources
and verification, including: Defining functional requirements for verification environments & metrics SystemVerilog UVM testbenches Formal proof verification Understanding of C test cases and C code Scripting languages (e.g. Python, Perl, TCL) Desirable skills Experience with formal verification tools (JasperGold, VC Formal) Familiarity with C/C++ development Prior SSD experience with storage interfaces such as SAS or PCIe (NVMe preferred) What More ❯
banbury, south east england, united kingdom Hybrid / WFH Options
IC Resources
and verification, including: Defining functional requirements for verification environments & metrics SystemVerilog UVM testbenches Formal proof verification Understanding of C test cases and C code Scripting languages (e.g. Python, Perl, TCL) Desirable skills Experience with formal verification tools (JasperGold, VC Formal) Familiarity with C/C++ development Prior SSD experience with storage interfaces such as SAS or PCIe (NVMe preferred) What More ❯
Stevenage, Hertfordshire, South East, United Kingdom
Morson Talent
and network administration (firewalls, local config) Knowledge of spacecraft/bus interfaces (MIL-1553, SpaceWire, CAN, RS232/422) Ability to write scripts/test sequences (e.g. Bash, Python, TCL, VBA, C/Java advantageous) Willingness to travel and support extended hours during campaigns More ❯
Stevenage, Hertfordshire, South East, United Kingdom
Morson Talent
test sequences (CCS/ATP or similar) Strong spacecraft system awareness (TM/TC, MIL-1553, SpaceWire, FDIR, AOCS, power, thermal) Experience with C/Java/Python/TCL/VBA or bespoke test languages (e.g. Elisa) Comfortable with Linux/Windows test environments & standard electrical lab instruments Experience supporting environmental/launch test campaigns and NRBs/TRBs More ❯
Stevenage, Hertfordshire, South East, United Kingdom
Yolk Recruitment
Configuration Vectors etc. Programming and scripting languages, particularly writing and debugging Linux/Unix bash scripts is an advantage. Knowledge of a programming language such as C, Java, python, TCL, VBA would be useful but not essential. Competent in the use of various test equipment used for electrical measurements, e.g. DMM, oscilloscope, current probes, Data acquisition unit, data bus monitors More ❯
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
london (city of london), south east england, united kingdom
IC Resources
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
Stevenage, Hertfordshire, South East, United Kingdom
Certain Advantage
test sequences/scripts for execution of spacecraft tests from the Central Checkout System (CCS) Spacecraft systems and subsystem technical knowledge Programming and scripting languages such asC, Java, python, TCL, VBA Knowledge of system testing & Verification The Benefits: Hourly rate circa £55 via Umbrella company Training and Development Does this sound like your next career move? Apply today. Working with More ❯