Senior Digital Verification Engineer
- Location
- Glasgow, Scotland, United Kingdom
component creation, sequences, drivers, monitors, and scoreboards.* Solid understanding and practical use of **Constrained Random Verification** techniques.* Experience with **Metrics‐Driven Verification**, including functional coverage and verification planning.* Ability to write **SystemVerilog Assertions (SVA)** for protocol and design checking.* Demonstrated success in achieving **Coverage Closure** across functional … code coverage metrics.* Experience analysing coverage results and refining test strategies to close gaps.* Strong debugging skills across simulations and complex verification environments.* Knowledge of Formal Verification methods would be advantageous.More information about NXP in the United Kingdom...#LI-c856 #J-18808-Ljbffr ...