Code Coverage Jobs in the South East

10 of 10 Code Coverage Jobs in the South East

Application Engineer (Backend)

Farnborough, Hampshire, United Kingdom
Discover Financial Services, Inc
to production unattended. You will actively manage and escalate risk and customer-impacting issues within the day-to-day role to management. How You'll Do It Analyze, design, code, test, and deploy new user stories and product features with high quality (security, reliability, operations) to production. Understands the software development lifecycle and leverages critical thinking skills to properly … Kubernetes technologies, Artifactory, IaC Experience with Test Driven Development (TDD) Experience with Behavior Driven Development (BDD, Cucumber test framework) Experience writing unit and service level tests to ensure adequate code coverage (JUnits) Drools Proven skills in high availability and scalability design, as well as performance monitoring Experience developing and implementing API service architecture Experience in working with a More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted:

Senior Software Engineer I

Southampton, England, United Kingdom
Risk Solution Group
following: Java, Springboot, Python, C#, .NET, Kafka. Have an excellent understanding of data modelling principles, data manipulation languages, and storage systems Good knowledge of industry best practices, such as code coverage Proficiency of software development methodologies (e.g., Agile, Scrum, Kanban) and test-driven development Ability to interface competently with other technical personnel or squad members to finalize requirements More ❯
Posted:

Design Verification Engineer

Theale, Berkshire, UK
Aion Silicon
Bristol. In this hands-on technical role, you will contribute to a variety of SoC, subsystem, and IP development projects, taking responsibility for the verification process from planning to coverage closure. Working closely with ASIC/SoC project leaders, you will architect, specify, and lead the implementation of high-level verification projects, using advanced verification languages. You will also … Desirable: A Master's or PhD in a related subject, with 5+ years of practical experience. Skills & Experience: Essential: Proven experience in metric-driven verification, including verification planning, functional coverage, code coverage, unit-level verification, and top-level verification. Expertise in testbench architecture design and hands-on experience with System Verilog, UVM, ABV, and constrained random verification. More ❯
Posted:

Senior Design Verification Engineer

Reading, England, United Kingdom
JR United Kingdom
and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. Manage functional and code coverage metrics to track and report progress. Troubleshoot, debug, and resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM More ❯
Posted:

Senior Design Verification Engineer

Guildford, England, United Kingdom
JR United Kingdom
and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. Manage functional and code coverage metrics to track and report progress. Troubleshoot, debug, and resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM More ❯
Posted:

Senior Design Verification Engineer

Brighton, England, United Kingdom
JR United Kingdom
and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. Manage functional and code coverage metrics to track and report progress. Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM More ❯
Posted:

Senior Design Verification Engineer

Slough, England, United Kingdom
JR United Kingdom
and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. Manage functional and code coverage metrics to track and report progress. Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM More ❯
Posted:

Senior Design Verification Engineer

Crawley, England, United Kingdom
JR United Kingdom
and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. Manage functional and code coverage metrics to track and report progress. Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM More ❯
Posted:

Design Verification Engineer

Newbury, Berkshire, UK
Hybrid / WFH Options
IC Resources
MEng/MSc Degree or equivalent in Electronics/Computer Science or other related discipline. Metric driven verification - verification planning, requirements extraction - Directed and constrained random verification - Functional and code coverage analysis SystemVerilog - SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills - RTL - Testbench, OOP - Gate level (including SDF) Scripting experience More ❯
Employment Type: Full-time
Posted:

Verification Engineer (PS)

Newbury, Berkshire, United Kingdom
Hybrid / WFH Options
Cirrus Logic
discipline. Proven track record in delivering 1st time success with complex mixed signal IC's. Metric driven verification - verification planning, requirements extraction - Directed and constrained random verification - Functional and code coverage analysis SystemVerilog - SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills - RTL - Testbench, OOP - Gate level (including SDF) Strong ability More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted: