4 of 4 Digital Design Engineer Jobs in Cambridge

Digital Design Engineer (FPGA) Cambridge | On-site (5 days) Up to £55k + benefits Are you looking to take the next step in your career, continuing an emphasis on Digital Design? Do you want to join a close knit team where you'll receive … growth, and have the ability to work on personal projects in a well-equipped lab? This is a brand new role in an established digital design team, working in the communications space. This role puts you at the heart of physical layer design. You'll take ownership ...

technologies used in both cellular and private networks, and look to deliver next-generation products. The team are looking to recruit a senior level engineer to provide additional expertise and resources for on-going and future projects. Key aspects will include high-performance board level electronics design, and to a lesser degree FPGA and ASIC development. This will encompass a full range of digital electronics including PCB and FPGA design. Further, due to the complexities involved in their products, it is not uncommon that their electronics utilises signal processing, AI, RF and software components. This ...

Title: Senior Digital Design Engineer Location: Cambridge, United Kingdom Job Type: Permanent Salary: 65K - 88K GBP per annum DOE Role Overview: Work at the forefront of open silicon and hardware security, contributing to next-generation secure ASIC/SoC designs based around RISC-V, cryptographic accelerators … opportunity to make a direct impact on advanced silicon architecture and RTL design. Key Responsibilities: Contribute to the architecture and specification of new digital designs and enhancements to existing IP. Develop and maintain System Verilog RTL across a range of digital silicon IP. Work closely with Design ...

microTECH Global Limited in Cambridge, United Kingdom, seeks a Senior Digital Design Engineer to contribute to secure ASIC/SoC designs based on RISC-V and cryptographic accelerators. This hands-on role offers direct impact on silicon architecture and RTL design across open silicon IP. ...