Senior Digital IC Design Engineer (Glasgow)
City of London, Greater London, UK
Neuranics
chance to make a real impact, tackling challenges and driving breakthrough solutions in exciting and rapidly evolving markets. Job Summary: As an RTL Design Engineer, you will be responsible for the design, implementation, and verification of digital logic for our custom ASICs … Verilog. The role is hands-on and will involve extensive work within the Cadence toolchain. Key Responsibilities: Develop synthesizable Verilog RTL for core digital blocks interfacing with TMR-based analog front ends and system controllers Collaborate with the ASIC and sensor system designers to define block-level specifications … tape-out flow and post-silicon bring-up alongside test engineers Contribute to system integration with embedded software and mixed-signal components Document design specifications, verification plans, and testbench structures Requirements: BSc/MSc/PhD in Electrical Engineering, Computer Engineering, or related field 5+ years of experience More ❯
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