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3 of 3 Electronic Design Automation Jobs in Central London
City of London, London, United Kingdom Hybrid / WFH Options Morson Talent
We're Hiring: Research Engineer – AI for PCB Design (Full-Time | Hybrid | London) About DeepPCB DeepPCB is My Client’s cutting-edge AI-powered Place & Route design tool for Printed Circuit Boards (PCBs). By combining deep reinforcement learning with high-performance computing, DeepPCB automates and accelerates PCB layout workflows—helping hardware teams around the world design … . The Opportunity We’re looking for a Research Engineer to join the DeepPCB team and push the boundaries of artificial intelligence in electronic design automation ( EDA). In this role, you'll design, build, and scale advanced machine learning systems—solving complex real-world PCB design challenges and contributing to the future of intelligent … clean code practices, and CI/CD workflows. Comfort working in a fast-paced, collaborative, and research-driven environment. Nice to Haves Hands-on experience with PCB design, EDA software, or circuit-level optimization problems. Familiarity with high-performance computing tools like Kubernetes, Ray, or Dask. Open-source contributions, academic publications, or strong performance in ML competitions (e.g., Kaggle More ❯
City of London, London, United Kingdom IC Resources
strategic, execution-focused professionals with experience in B2B tech, developer tools, or embedded systems. Location: London preferred Compensation: Competitive salary + equity Experience: - Relevant technical degree, or equivalent, in electronic … engineering. - Proven experience in enterprise sales within automotive, defence or medical companies. - Hands-on sales and used to a start-up environment. - Experience selling embedded tools, developer tools or EDA software into OEMs. 👉 Apply now to Rebecca at IC Resources and help reimagine the infrastructure powering the electronics of tomorrow. More ❯
City of London, London, United Kingdom Flux Computing
people leadership and disciplined program management—all exercised across multiple concurrent tape‐outs. Responsibilities Build and maintain the ASIC master schedule—including IP development, verification, physical implementation, package co‐ design, MPW/test‐chip shuttles, qualification and production ramps. Drive weekly cross‐functional reviews and executive read‐outs. Directly manage and mentor the Analog and Digital ASIC Leads (and … via them, ~25 + engineers). Set goals, hire strategically, grow technical leaders and foster a culture of first‐pass silicon success. Provide architectural guidance and critical design‐review sign‐off for blocks running from > 20 GHz analog bandwidth to > 100 MHz digital core clocks . Resolve spec splits, timing closures, power budgets and mixed‐signal interactions. Act as … wafer starts, corner‐split strategies and yield‐learning plans. Own silicon CAPEX/OPEX budgets, mask and backend costs, and risk registers. Drive make/buy decisions for IP, EDA, test hardware and probe cards. Skills & Experience 15 + years in semiconductor development, with 3 + complex ASICs driven from concept through ramp‐to‐production at ≤ 22 nm . Demonstrated More ❯
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