14 of 14 Electronic Design Automation Jobs in the UK

operating systems (in Rust and C). - Compilers, code generators, and linters. - Simulators and emulators (e.g. QEMU). - Electronic design automation (EDA) tools. - Performance and code size analysis. - Cloud-based infrastructure (such as continuous integration pipelines) Requirements : - Highly proficient in Rust programming; deep understanding of fundamental concepts …/CD for embedded or systems software. - Strong knowledge of computer architecture; some experience with assembly languages (x86, RISC-V); familiarity with hardware design is a plus. - Good knowledge of Linux. - Experience contributing to open source projects. - Higher degree levels and academic research experience are highly valued. ...

from multiple internal and external sources. Develop, test, and deploy predictive models and machine learning algorithms to address business challenges. Conduct exploratory data analysis (EDA) to uncover trends, patterns, anomalies, and key drivers. Communicate insights and recommendations through clear storytelling, visualisations, and dashboards. Collaborate with engineering teams to productionise models ...

integration Oversee resource planning, project schedules, budgets and delivery milestones Mentor, coach and technically develop IC design engineers Represent the digital team in EDA tool selection and methodology decisions Collaborate across global engineering teams to ensure seamless design flow Support silicon debug, failure analysis and validation activities Knowledge … full digital IC design lifecycle from specification to silicon Experience with low-power design and power management techniques Solid understanding of EDA tools and digital design flows through to timing sign-off Knowledge of DfT, DfM, silicon debug and failure analysis methodologies Strong communication skills with ...

Location: Bristol, Cambridge, Edinburgh Role Overview: Early stage start up specialising in AI chip design Key Responsibilities: Collaborate with our team to design, develop, and optimize a new chip architecture for our AI processor. Conduct research and analysis to identify cutting-edge trends, techniques, and technologies … using Verilog) Strong understanding of digital circuit design and computer architecture. Familiarity with neural network algorithms and computational models Experience with industry-standard EDA tools (e.g., Vivado or Cadence, Synopsys, or Mentor Graphics) Strong problem-solving skills and the ability to work independently and collaboratively Excellent communication and interpersonal ...

Working with global partners and internal IP suppliers, you will represent the digital team's needs in key decisions, whether that's IP selection, EDA tool adoption or design-flow optimisation. It's an ideal position for someone who thrives in a hands-on leadership role at the intersection … through verification, validation and silicon sign-off. Experience in low power design techniques, area optimisation and the selection and evaluation of EDA toolchains will be particularly valuable. A strong understanding of IP supply chains, including maturity models and third party IP quality assessment, will help you thrive in this ...

Working with global partners and internal IP suppliers, you will represent the digital team's needs in key decisions, whether that's IP selection, EDA tool adoption or design-flow optimisation. It's an ideal position for someone who thrives in a hands-on leadership role at the intersection … through verification, validation and silicon sign-off. Experience in low power design techniques, area optimisation and the selection and evaluation of EDA toolchains will be particularly valuable. A strong understanding of IP supply chains, including maturity models and third party IP quality assessment, will help you thrive in this ...

Peers Collaborating with Senior Principal Engineers Expert level Understanding of different parts of the design & verification cycle. Experience working with leading edge EDA tools and process nodes using industry standard languages and methodologies (e.g. Systemverilog, UVM, Formal). Working on high volume data centre & enterprise products used by industry … leading Companies. Experience of working on projects with teams located internationally. Verification Engineer qualifications and skills: 5-10+ years of digital ASIC design and verification experience Vast experience of: Translating design requirements into RTL Deriving functional requirements for verification Systemverilog UVM test benches Scripting languages & REST ...

Senior Digital IC Design Engineer UK | Hybrid | Competitive Salary An innovative deep-tech start-up developing next-generation computing hardware for autonomous and edge systems is seeking a Senior Digital IC Design Engineer.Youll play a key role in shaping architecture, driving digital design from concept to tape … computer architecture Proven RTL design experience in Verilog/SystemVerilog Deep understanding of cache hierarchies, bus protocols, memory management units, and task scheduling EDA skills are a bonus Apply now to join a pioneering hardware team building the next generation of intelligent computing systems. ...

related to high speed SerDes designs Debug and flag bugs with design team Enhance and develop new methodologies with the verification team and EDA vendors Document and track verification plan tasks, bug findings and methodology work You will have: Good scripting techniques Good understanding of fabrication process, process corners … understanding of revision control Good communication and reporting skills Experience 10 years of experience on digital/mixed signal/analog verification: test bench design, connect modules, design electrical/discrete partitioning, UDN, wreal, compile and elaboration debug Experience in behavioral modelling, basic knowledge of analog building blocks ...

Senior Digital IC Design Engineer UK | Hybrid | Competitive Salary An innovative deep-tech start-up developing next-generation computing hardware for autonomous and edge systems is seeking a Senior Digital IC Design Engineer. You’ll play a key role in shaping architecture, driving digital design from concept … computer architecture Proven RTL design experience in Verilog/SystemVerilog Deep understanding of cache hierarchies, bus protocols, memory management units, and task scheduling EDA skills are a bonus Apply now to join a pioneering hardware team building the next generation of intelligent computing systems. ...

Title: Senior Hardware Verification Engineer Location: Cambridge, England, United Kingdom (Hybrid possible inside the UK) About the Role: We are seeking a seasoned Design Verification designer with a strong background in building testbenches and writing test sequences for complex IPs. The ideal candidate will play a key role … years and current hands-on experience in block-level/IP-level/SOC-level verification Proficiency in Verilog, SystemVerilog Familiarity with industry-standard EDA tools for simulation and debug Deep experience with UVM-based testbenches Experience with modern programming languages like Python Knowledge of ARM AMBA protocols such ...

Senior Physical Design Engineer - Bristol An innovative semiconductor company is seeking a Senior Physical Design Engineer to support the delivery of next-generation, low-power Wi-Fi SoCs used in high-volume consumer devices. This is a key backend position with real ownership across the full implementation cycle … timing closure methodologies and sign-off requirements Experience with low-power implementation for battery-operated or power-sensitive designs Familiarity with industry-standard EDA tools and scripting (Tcl, Python, Shell or similar) Ability to take ownership of complex technical challenges in a fast-paced development environment This Senior Physical Design ...

running AMS simulations will all form part of this critical role, together with identifying bugs, and developing new methodologies with the verification team and EDA vendors. The successful Mixed Signal Verification Engineer will have: Proven experience within AMS (Analog Mixed Signal) Verification Expertise in test bench design, behavioral modelling ...

complexity and state-space explosion. Partner with global Architecture and RTL Design teams to influence design-for-verification (DFV) decisions. Engage with EDA vendors to explore and implement cutting-edge sign-off methodologies. Key requirements: Mastery of industry-standard formal tools (e.g., JasperGold, VC Formal, or Questa Formal ...