Research Associate- Heterogeneous Integration: Manufacturing Pathways,Test&Supply Chain
- Location
- Sheffield, England, United Kingdom
cutting constraints spanning the logical‐physical boundary - DfT (e.g. IEEE 1838 3D‐IC test, known‐good‐die implications), DfP (UPF/CPF power intent, IVR strategies, backside power delivery), DfS (hardware root‐of‐trust, chiplet attestation, secure supply chain, side‐channel considerations) and DfTh (thermal‐aware floorplanning, TIM selection, embedded ...