1 of 1 JTAG Jobs in Edinburgh

of Subsystems, Memory Controllers, and memory architectures (e.g., SRAM, ROM, eFuse) Extensive experience with the Digital ASIC Flow, RTL design (Verilog), synthesis, timing closure, and debug methodologies (e.g., DFT, JTAG, Scan, BIST). Extensive knowledge of SOC architecture, setup/silicon bring-up, validation, and all associated processes. SOC design, system design, architecture, and IP selection & integration DSP/signal More ❯