2 Mentor Graphics Jobs in the Midlands

level requirements and detailed designs, Writing VHDL and Verilog HDL code using Sigasi Studio, Simulating HDL designs at unit, integration and system level using Mentor Graphics QuestaSIM, Undertaking synthesis, place and route and static timing analysis using Synopsis Synplify, targeting Xilinx FPGAs, Developing Python scripts for process automation more »

IR35 and will last 12 months initially. To be successful you will ideally have previous experience doing: VHDL verification. FPGA Firmware programming in VHDL Mentor Graphics FPGA Design toolset: QuestaSim, Precision Synthesis Xilinx Zynq Ultrascale+ If you think you would be a good fit apply below and one more »