Processor estate within a multi-LPAR, multi-site Sysplex environment Upgrading the UK Mainframe estate to the next generation of IBM Processor Upgrading the Microcode levels on the Mainframe Processors, Coupling Facilities, HMCs and TKEs Building and activating IODF/IOCDS configurations in support of changes to the Storage estate More ❯
and 2 years in two or more of the following technical categories: Virtualization security (Xen, KVM, QEMU) - Hardware security (PCB, JTAG, UART, SPI, ROM, microcode, custom ASIC/FPGA) - x86 and/or ARM chipset and firmware security (TPM, UEFI, TrustZone, Secure Boot, JTAG, PCIe) - Physical security testing at the More ❯
and 2 years in two or more of the following technical categories: Virtualization security (Xen, KVM, QEMU) - Hardware security (PCB, JTAG, UART, SPI, ROM, microcode, custom ASIC/FPGA) - x86 and/or ARM chipset and firmware security (TPM, UEFI, TrustZone, Secure Boot, JTAG, PCIe) - Physical security testing at the More ❯
and 2 years in two or more of the following technical categories: Virtualization security (Xen, KVM, QEMU) - Hardware security (PCB, JTAG, UART, SPI, ROM, microcode, custom ASIC/FPGA) - x86 and/or ARM chipset and firmware security (TPM, UEFI, TrustZone, Secure Boot, JTAG, PCIe) - Physical security testing at the More ❯
