development out of scope) Strong verification expertise in OSVVM/UVVM (or UVM) methodologies and test bench architecture Familiar with technologies such as AXI, PCIe, Ethernet, OCP, Wishbone, JESD204, CameraLink, SMPTE Tool experience: DOORS , Vivado, ModelSim, Diamond, Radiant, Vitis, or Propel Solid understanding of DO-254 processes (not necessarily certification More ❯
development out of scope) Strong verification expertise in OSVVM/UVVM (or UVM) methodologies and test bench architecture Familiar with technologies such as AXI, PCIe, Ethernet, OCP, Wishbone, JESD204, CameraLink, SMPTE Tool experience: DOORS , Vivado, ModelSim, Diamond, Radiant, Vitis, or Propel Solid understanding of DO-254 processes (not necessarily certification More ❯
development out of scope) Strong verification expertise in OSVVM/UVVM (or UVM) methodologies and test bench architecture Familiar with technologies such as AXI, PCIe, Ethernet, OCP, Wishbone, JESD204, CameraLink, SMPTE Tool experience: DOORS , Vivado, ModelSim, Diamond, Radiant, Vitis, or Propel Solid understanding of DO-254 processes (not necessarily certification More ❯
development out of scope) Strong verification expertise in OSVVM/UVVM (or UVM) methodologies and test bench architecture Familiar with technologies such as AXI, PCIe, Ethernet, OCP, Wishbone, JESD204, CameraLink, SMPTE Tool experience: DOORS , Vivado, ModelSim, Diamond, Radiant, Vitis, or Propel Solid understanding of DO-254 processes (not necessarily certification More ❯
development out of scope) Strong verification expertise in OSVVM/UVVM (or UVM) methodologies and test bench architecture Familiar with technologies such as AXI, PCIe, Ethernet, OCP, Wishbone, JESD204, CameraLink, SMPTE Tool experience: DOORS , Vivado, ModelSim, Diamond, Radiant, Vitis, or Propel Solid understanding of DO-254 processes (not necessarily certification More ❯
development out of scope) Strong verification expertise in OSVVM/UVVM (or UVM) methodologies and test bench architecture Familiar with technologies such as AXI, PCIe, Ethernet, OCP, Wishbone, JESD204, CameraLink, SMPTE Tool experience: DOORS , Vivado, ModelSim, Diamond, Radiant, Vitis, or Propel Solid understanding of DO-254 processes (not necessarily certification More ❯
Northampton, England, United Kingdom Hybrid / WFH Options
Technical Futures. Careers
and caching services in a hypervisor environment. Linux memory control error reporting via MCE and EDAC. Familiarity with high-speed signalling technologies such as PCIe or CXL. Debugging at application, driver and hardware levels. Knowledge of communication protocols including TLS, TCP/IP & Ethernet. More ❯
Northampton, Northamptonshire, East Midlands, United Kingdom Hybrid / WFH Options
Technical Futures
and caching services in a hypervisor environment. Linux memory control error reporting via MCE and EDAC. Familiarity with high-speed signalling technologies such as PCIe or CXL. Debugging at application, driver and hardware levels. Knowledge of communication protocols including TLS, TCP/IP & Ethernet. As a key member of an More ❯
NN4, Great Houghton, West Northamptonshire, Northamptonshire, United Kingdom Hybrid / WFH Options
Technical Futures Ltd
and caching services in a hypervisor environment. Linux memory control error reporting via MCE and EDAC. Familiarity with high-speed signalling technologies such as PCIe or CXL. Debugging at application, driver and hardware levels. Knowledge of communication protocols including TLS, TCP/IP & Ethernet. As a key member of an More ❯
including proficiency with SystemVerilog and UVM. Ability to think creatively about solutions outside of UVM. Experience with high-speed networking interfaces and protocols like PCIe, SERDES or Ethernet. Demonstrated ability to collaborate effectively with design teams to meet objectives. If you'd like more information, apply below More ❯
including proficiency with SystemVerilog and UVM. Ability to think creatively about solutions outside of UVM. Experience with high-speed networking interfaces and protocols like PCIe, SERDES or Ethernet. Demonstrated ability to collaborate effectively with design teams to meet objectives. If you'd like more information, apply below More ❯
including proficiency with SystemVerilog and UVM. Ability to think creatively about solutions outside of UVM. Experience with high-speed networking interfaces and protocols like PCIe, SERDES or Ethernet. Demonstrated ability to collaborate effectively with design teams to meet objectives. If you'd like more information, apply below More ❯
including proficiency with SystemVerilog and UVM. Ability to think creatively about solutions outside of UVM. Experience with high-speed networking interfaces and protocols like PCIe, SERDES or Ethernet. Demonstrated ability to collaborate effectively with design teams to meet objectives. If you'd like more information, apply below More ❯
including proficiency with SystemVerilog and UVM. Ability to think creatively about solutions outside of UVM. Experience with high-speed networking interfaces and protocols like PCIe, SERDES or Ethernet. Demonstrated ability to collaborate effectively with design teams to meet objectives. If you'd like more information, apply below More ❯
including proficiency with SystemVerilog and UVM. Ability to think creatively about solutions outside of UVM. Experience with high-speed networking interfaces and protocols like PCIe, SERDES or Ethernet. Demonstrated ability to collaborate effectively with design teams to meet objectives. If you'd like more information, apply below More ❯
based on ARM Architecture Should be familiar with AMBA based bus protocols like CHI, AXI, AHB, APB etc., Hands on experience in integration of PCIe and Ethernet Ips Good knowledge on design static checks like CDC, RDC, CLP etc., Hands on experience on chip IO integration Desirable to have working More ❯
based on ARM Architecture Should be familiar with AMBA based bus protocols like CHI, AXI, AHB, APB etc., Hands on experience in integration of PCIe and Ethernet Ips Good knowledge on design static checks like CDC, RDC, CLP etc., Hands on experience on chip IO integration Desirable to have working More ❯
based on ARM Architecture Should be familiar with AMBA based bus protocols like CHI, AXI, AHB, APB etc., Hands on experience in integration of PCIe and Ethernet Ips Good knowledge on design static checks like CDC, RDC, CLP etc., Hands on experience on chip IO integration Desirable to have working More ❯
based on ARM Architecture Should be familiar with AMBA based bus protocols like CHI, AXI, AHB, APB etc., Hands on experience in integration of PCIe and Ethernet Ips Good knowledge on design static checks like CDC, RDC, CLP etc., Hands on experience on chip IO integration Desirable to have working More ❯
based on ARM Architecture Should be familiar with AMBA based bus protocols like CHI, AXI, AHB, APB etc., Hands on experience in integration of PCIe and Ethernet Ips Good knowledge on design static checks like CDC, RDC, CLP etc., Hands on experience on chip IO integration Desirable to have working More ❯
based on ARM Architecture Should be familiar with AMBA based bus protocols like CHI, AXI, AHB, APB etc., Hands on experience in integration of PCIe and Ethernet Ips Good knowledge on design static checks like CDC, RDC, CLP etc., Hands on experience on chip IO integration Desirable to have working More ❯
chesterfield, midlands, United Kingdom Hybrid / WFH Options
Athsai
with SOC Environment methodology and flows. Ability to debug and also coach fellow team member to debug effectively ARM Processor and CHI working experience PCIE or DDR hands on experience Notes: System-on-Chip (SoC) verification and Intellectual Property (IP) verification both are crucial aspects of the semiconductor design process. More ❯
derby, midlands, United Kingdom Hybrid / WFH Options
Athsai
with SOC Environment methodology and flows. Ability to debug and also coach fellow team member to debug effectively ARM Processor and CHI working experience PCIE or DDR hands on experience Notes: System-on-Chip (SoC) verification and Intellectual Property (IP) verification both are crucial aspects of the semiconductor design process. More ❯
lincoln, midlands, United Kingdom Hybrid / WFH Options
Athsai
with SOC Environment methodology and flows. Ability to debug and also coach fellow team member to debug effectively ARM Processor and CHI working experience PCIE or DDR hands on experience Notes: System-on-Chip (SoC) verification and Intellectual Property (IP) verification both are crucial aspects of the semiconductor design process. More ❯
nottingham, midlands, United Kingdom Hybrid / WFH Options
Athsai
with SOC Environment methodology and flows. Ability to debug and also coach fellow team member to debug effectively ARM Processor and CHI working experience PCIE or DDR hands on experience Notes: System-on-Chip (SoC) verification and Intellectual Property (IP) verification both are crucial aspects of the semiconductor design process. More ❯
