the hardware layer Possess effective problem-solving skills, familiar with a full suite of debug and performance analysis tools and techniques Experience with one or more of the following: PCIe, CPU, device drivers, SoC, firmware, and hardware/software integration Proactive in driving engineering collaboration & obtaining input to solve issues Proven ability to schedule own workload Excellent written and verbal More ❯
Ability to collaborate with software, silicon, and hardware design teams. Problem-solving skills for complex electronic systems. Excellent communication and presentation skills. Experience developing tests for high-speed interconnects (PCIe Gen5/6, Ethernet). Experience with microcontroller development/debug environments. Experience in both NPI and volume manufacturing testing. Several years of relevant experience. Basic data analysis skills. Experience More ❯
transistor knowledge including std cell libraries and/or memories 5D and 3D design (CoWoS, UCIe etc.) High speed, high power and/or full reticle chip design Ethernet, PCIe, LPDDR, HBM interfaces Power integrity and optimization 2nm or 3nm technologies Chip finishing (pad rings, chip level LVS/DRC/ERC) Design for test Team management Project Planning In More ❯
ASIC design, from specification to RTL, along with a working knowledge of the RTL to tape-out process Proven expertise in ASIC microarchitecture, including interconnect design, CPU integration, DDR, PCIe, JESD204, and system-level considerations such as pinout, ballout, die size, and power consumption. Familiarity with system-on-chip interconnect protocols such as AMBA AHB, APB, and at least one More ❯
using tools like Jira or Bugzilla Mentor junior engineers and elevate team capability Tech Stack & Skills: Strong knowledge of memory test technology and high-speed serial protocols (SATA, SAS, PCIe) Programming experience in Python or C++ Deep understanding of the automated memory test process Strong communication and presentation skills Background: Bachelor's (5+ years exp) or Master's (2+ years More ❯
systems, particularly involving high-speed digital protocols such as SFPDP. Strong expertise in multi-threaded and concurrent programming, low-level I/O, DMA, and driver-level interactions with PCIe or similar hardware. Skilled in designing and implementing software sequencing frameworks or custom state machines to support test execution. Demonstrated ability to integrate and debug complex software-hardware systems, with More ❯
