17 of 17 RISC-V Jobs in the South East

years of experience. Strong knowledge of cryptographic algorithms and hardware architectures. Proficiency in Verilog and SystemVerilog. Experience developing testbenches for verification. Familiarity with RISC-V processor cores. Post-quantum cryptography experience is highly desirable. Additional Information Sponsorship can be provided for candidates already based in the United Kingdom. ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

with demonstrable reverse engineering experience) Reverse engineering across various architectures and platforms; including x86/64, ARM. Experience with other platforms such as MIPS, RISCV and others are desirable Experience with disassemblers and decompilers (IDA Pro, Binary Ninja, or Ghidra) Knowledge of common exploitation countermeasures and their bypasses ...

Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads. Key Responsibilities: Develop and maintain compiler backend for our RISC-V vector extensions Implement code generation and optimization passes for graphics … similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Strong C++ programming skills Background in performance analysis and optimization BS/MS in Computer Science or related ...