1 to 25 of 33 RISC-V Jobs in the UK

Further development of proven prototypes to a deployment standard Development of software in a real-time embedded environment using Linux. (e.g. Microblaze or RISC-V using C/C++) ABOUT YOU Experience programming Embedded Systems using C/C++ Experience of bare-metal and embedded Linux environments Knowledge More ❯

Further development of proven prototypes to a deployment standard * Development of software in a real-time embedded environment using Linux. (e.g. Microblaze or RISC-V using C/C++) **ABOUT YOU*** Experience programming Embedded Systems using C/C++* Experience of bare-metal and embedded Linux environments* Knowledge More ❯

Further development of proven prototypes to a deployment standard * Development of software in a real-time embedded environment using Linux. (e.g. Microblaze or RISC-V using C/C++) **ABOUT YOU*** Experience programming Embedded Systems using C/C++* Experience of bare-metal and embedded Linux environments* Knowledge More ❯

Experience with Zephyr RTOS and open-source RTOS ecosystems. Experience contributing to and working with open-source ecosystems. Understanding of heterogeneous architectures (ARM, RISC-V, DSPs, custom SoCs). Experience integrating AI/ML for embedded optimization or tooling automation. Familiarity with TypeScript, Node.js, Rust, etc for command More ❯

have demonstrated experience with some of the following technologies: Computer graphics APIs such as OpenGL or Vulkan RTL design in Verilog ARM/RISC-V architecture concepts Modern software design practices in C++ Knowledge of compilers and tool chains Computer architectures Docker containers FPGA tool flows More ❯

bridge the gap between architectural excellence and user experience. Required: 5+ years of relevant experience Familiar with CPU instruction set architecture, e.g. Arm, RISC-V Familiar with general purpose CPU micro-architecture, such as pipelining, out-of-order execution, and caches Strong data analysis skill and software development More ❯

have demonstrated experience with some of the following technologies: - Computer graphics APIs such as OpenGL or Vulkan - RTL design in Verilog - ARM/RISC-V architecture concepts - Modern software design practices in C++ - Knowledge of compilers and tool chains - Computer architectures - Docker containers - FPGA tool flows More ❯

bridge the gap between architectural excellence and user experience. Required: 5+ years of relevant experience Familiar with CPU instruction set architecture, e.g. Arm, RISC-V Familiar with general purpose CPU micro-architecture, such as pipelining, out-of-order execution, and caches Strong data analysis skill and software development More ❯

bridge the gap between architectural excellence and user experience. Required: 5+ years of relevant experience Familiar with CPU instruction set architecture, e.g. Arm, RISC-V Familiar with general purpose CPU micro-architecture, such as pipelining, out-of-order execution, and caches Strong data analysis skill and software development More ❯

bridge the gap between architectural excellence and user experience. Required: 5+ years of relevant experience Familiar with CPU instruction set architecture, e.g. Arm, RISC-V Familiar with general purpose CPU micro-architecture, such as pipelining, out-of-order execution, and caches Strong data analysis skill and software development More ❯

+ stock options! I'm currently partnered with a Semiconductor start-up, based in Silicon Valley. They are working on re-imagining Silicon, creating RISCV based computing platforms aimed at transforming the industry. As a Principal Performance Modelling Engineer you will develop functional and timing simulators, undertake performance analysis for More ❯

+ stock options! I'm currently partnered with a Semiconductor start-up, based in Silicon Valley. They are working on re-imagining Silicon, creating RISCV based computing platforms aimed at transforming the industry. As a Principal Performance Modelling Engineer you will develop functional and timing simulators, undertake performance analysis for More ❯

+ stock options! I'm currently partnered with a Semiconductor start-up, based in Silicon Valley. They are working on re-imagining Silicon, creating RISCV based computing platforms aimed at transforming the industry. As a Principal Performance Modelling Engineer you will develop functional and timing simulators, undertake performance analysis for More ❯

needed Requirements: 5+ years of experience in hardware verification (preferably SoCs) Strong skills in SystemVerilog and UVM Familiarity with GPU , AI accelerators , or RISC-V (bonus) Experience with scripting languages (Python, Perl, TCL) Why Join? Work on cutting-edge GPU and AI projects Be part of an innovative More ❯

compensation package, including healthcare, stock options, and retirement benefits Why Should You Care About This Company? A pioneering team with deep expertise in RISC-V, ARM, x86, and other CPU architectures A startup culture backed by top-tier investors and industry veterans A unique opportunity to own significant More ❯

Kingdom time type Full time posted on Posted 7 Days Ago job requisition id R-100181 About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest … across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits. At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and … out our website and Glassdoor pages. Job Description: Principal System and Software Architect The Role: Do you want to be part of the RISC-V revolution? RISC-V and SiFive are redefining computing platforms for the 21st century. As a System and Software Architect, you'll More ❯

CPU Verification Engineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for systems … languages. Understanding of CPU architecture and micro-architecture features (such as caches, MMU, SMP, coherency, CPU pipelines). Familiar with the ARM/RISC-V/MIPS architecture and the micro-architecture of current ARM/RISC-V CPU cores. Strong understanding of modelling microprocessors using More ❯

CPU Verification Engineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for systems … languages. Understanding of CPU architecture and micro-architecture features (such as caches, MMU, SMP, coherency, CPU pipelines). Familiar with the ARM/RISC-V/MIPS architecture and the micro-architecture of current ARM/RISC-V CPU cores. Strong understanding of modelling microprocessors using More ❯

CPU Verification Engineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for systems … languages. Understanding of CPU architecture and micro-architecture features (such as caches, MMU, SMP, coherency, CPU pipelines). Familiar with the ARM/RISC-V/MIPS architecture and the micro-architecture of current ARM/RISC-V CPU cores. Strong understanding of modelling microprocessors using More ❯

guiding important design decisions. We unify the domains of deterministic computation and performance to build a proof-generating virtual machine which runs common RISC-V Linux programs. This tool allows us to verify what is being run and ensure that it is being run according to our set More ❯

Senior Software Engineer - RISC-V at Trilitech, powered by Tezos Our Team At Trilitech, our mission is to power the Web3 revolution by building cutting-edge solutions on the Tezos blockchain. We specialise in core development, application development, and business development across three key areas: Culture, Decentralised Finance More ❯

Staff Software Engineer - RISC-V at Trilitech, powered by Tezos Our Team At Trilitech, our mission is to power the Web3 revolution by building cutting-edge solutions on the Tezos blockchain. We specialise in core development, application development, and business development across three key areas: Culture, Decentralised Finance More ❯

unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language … CodAL , and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including … motivated self-starters who enjoy working on something revolutionary in an innovative company. To be responsible for the microarchitecture definition and implementation of RISC-V processors and extensions Processor development within the Codasip Architectural Language (CodAL) Undertaking design synthesis and results analysis to ensure PPA targets can be More ❯

unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language … CodAL , and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including … motivated self-starters who enjoy working on something revolutionary in an innovative company. To be responsible for the microarchitecture definition and implementation of RISC-V processors and extensions Processor development within the Codasip Architectural Language (CodAL) Undertaking design synthesis and results analysis to ensure PPA targets can be More ❯

Software Engineer - Compiler Role Overview: Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads. Key Responsibilities: Develop and maintain compiler backend for our RISC-V vector extensions Implement code generation and optimization … similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Strong C++ programming skills Background in performance analysis and optimization More ❯