4 of 4 Senior FPGA Engineer Jobs in Scotland

Senior/Principal FPGA Engineer Edinburgh (Hybrid, 2 days from home) circa £88 per hour + overtime Contract position Virtual interview Mon–Fri Certain Advantage is collaborating with a key client to recruit Senior/Principal FPGA Engineers who will be responsible for the design and development of FPGA designs using VHDL and verifying designs using VHDL or System Verilog. What will you be doing? Creating innovative and robust VHDL-based designs Documenting and recording deliverables Verifying FPGA designs Ensuring configuration management/keeping designs under revision control Providing progress reports A couple of things you should know: At least 5 years’ experience of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and third-party synthesis tools Experience in specifying timing and area constraints for efficient FPGA Place and Route. Independent verification using VHDL Experience of More ❯

Senior/Principal FPGA Engineer Edinburgh (Hybrid, 2 days from home) circa £88 per hour + overtime Contract position Virtual interview Mon–Fri Certain Advantage is collaborating with a key client to recruit Senior/Principal FPGA Engineers who will be responsible for the design and development of FPGA designs using VHDL and verifying designs using VHDL or System Verilog. What will you be doing? Creating innovative and robust VHDL-based designs Documenting and recording deliverables Verifying FPGA designs Ensuring configuration management/keeping designs under revision control Providing progress reports A couple of things you should know: At least 5 years’ experience of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and third-party synthesis tools Experience in specifying timing and area constraints for efficient FPGA Place and Route. Independent verification using VHDL Experience of More ❯

Senior/Principal FPGA Engineer Edinburgh (Hybrid, 2 days from home) circa £88 per hour + overtime Contract position Virtual interview Mon–Fri Certain Advantage is collaborating with a key client to recruit Senior/Principal FPGA Engineers who will be responsible for the design and development of FPGA designs using VHDL and verifying designs using VHDL or System Verilog. What will you be doing? Creating innovative and robust VHDL-based designs Documenting and recording deliverables Verifying FPGA designs Ensuring configuration management/keeping designs under revision control Providing progress reports A couple of things you should know: At least 5 years’ experience of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and third-party synthesis tools Experience in specifying timing and area constraints for efficient FPGA Place and Route. Independent verification using VHDL Experience of More ❯

Senior/Principal FPGA Engineer Edinburgh (Hybrid, 2 days from home) circa £88 per hour + overtime Contract position Virtual interview Mon–Fri Certain Advantage is collaborating with a key client to recruit Senior/Principal FPGA Engineers who will be responsible for the design and development of FPGA designs using VHDL and verifying designs using VHDL or System Verilog. What will you be doing? Creating innovative and robust VHDL-based designs Documenting and recording deliverables Verifying FPGA designs Ensuring configuration management/keeping designs under revision control Providing progress reports A couple of things you should know: At least 5 years’ experience of developing FPGA using VHDL or Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and third-party synthesis tools Experience in specifying timing and area constraints for efficient FPGA Place and Route. Independent verification using VHDL Experience of More ❯