4 of 4 SystemVerilog Jobs in Scotland

strong background in electronic engineering, embedded systems, computer engineering, or similar Hands-on experience with FPGA architecture, implementation, and hardware debugging Fluency in Verilog, SystemVerilog, or VHDL, along with practical PCB design and layout skills Familiarity with protocols such as PCIe, SPI, I2C, UART, or LVDS is welcome ...

Working for a leader in the Semi's industry, I am looking to recruit a high-level, Senior SOC Architect. This position can be based in Edinburgh or Cork. You will be tasked with the ...

United Kingdom is seeking a verification engineer with a strong background in SystemVerilog, UVM, and constrained random verification to verify digital hardware architectures and co-processors. You will develop strategies, tests, and environments for security features, and help evolve verification methodologies across projects. Ideal candidates hold a BSc/ ...

methodologies and introducing them into existing verification flows. Your Profile BSc., or MSc., degree in Electronics or Electrical Engineering. Strong hands-on experience with SystemVerilog for testbench development and verification. Proven expertise in UVM (Universal Verification Methodology), including component creation, sequences, drivers, monitors, and scoreboards. Solid understanding and practical … Constrained Random Verification techniques. Experience with Metrics‐Driven Verification, including functional coverage and verification planning. Ability to write SystemVerilog Assertions (SVA) for protocol and design checking. Demonstrated success in achieving Coverage Closure across functional and code coverage metrics. Experience analysing coverage results and refining test strategies to close gaps. Strong ...