15 of 15 Senior Verification Engineer Jobs

Join Our Team as a Senior Verification Engineer at Envisics! Are you ready to shape the future of augmented reality in the automotive industry? At Envisics, we are an internationally recognized innovator specializing in the development and supply of holographic technologies for Tier 1 suppliers and OEMs … optimizes both OEM manufacturing requirements and the end-user experience. To support our growth and success in product development, we are looking for a Senior Verification Engineer to join our Core Engineering Team. Why Work at Envisics? At Envisics, we understand that our people are our greatest ...

Royce pioneers cutting-edge technologies that deliver clean, safe & competitive solutions to meet our planet's vital power needs. We are looking for a Senior Control Systems Verification Engineer for a 12-month contract based in Derby or Solihull on a hybrid working arrangement. Job Description … Role As a Senior Control Systems Verification Engineer , you will work closely with systems, software, hardware, and certification teams to define verification strategies, execute system-level testing, generate certification evidence, and support compliance with aerospace regulatory standards. You will also interface directly with hardware test rigs ...

Senior Verification & Validation Engineer/Tooling/Python/Linux/Location: Wallingford - Oxfordshire Permanent At Dexory, we are transforming the warehousing and logistics industry through data intelligence. We’re currently recruiting for a senior verification and validation engineer to play a key role ...

together the very latest wireless and audio technologies to create industry leading audio voice and music products. About the role We are seeking a Senior Staff Design Verification Engineer to provide technical leadership and end‐to‐end ownership of verification for complex low‐power, mixed‐signal … SoCs. This role is based in Bristol or Cambridge and is suited to an engineer with demonstrated impact beyond a single project or block. As a Senior Staff Design Verification Engineer, you will set verification direction, influence design and system decisions, and ensure delivery ...

Senior Verification & Validation Engineer Do you want to define how the next generation of robots are tested, validated, and released? Interested in building the testing standards and infrastructure that will define how autonomous robots are validated at scale? One of our robotics partners is continuing to scale … autonomous robotics platform - and they’re looking for a Senior Verification & Validation Engineer to take ownership of the testing strategy across their robotics products. This is a highly influential role sitting at the intersection of robotics, software, hardware, autonomy, and data. You'll be key in ensuring ...

Envisics LLC is seeking a Senior Verification Engineer to advance verification environments for cutting-edge holographic HUD technology. You will design and implement Vplans, build multi-level testbenches, and integrate reference models to ensure robust verification across complex SoCs. The role requires 7+ years … ASIC/IP verification, strong SystemVerilog/SVA/UVM expertise, and proficiency in Verilog/VHDL with Python/Tcl scripting. #J-18808-Ljbffr ...

experienced AMS Verification Engineer looking to expand your career within a premier Semiconductor company? If so, this is a great opportunity. Based in Edinburgh, Scotland, our client has a global reputation for world-leading mixed-signal ICs for household consumer brands. They seek a Staff AMS Verification Engineer to be responsible for ensuring the functional correctness and robustness of complex analog and mixed-signal ASIC designs through advanced verification methodologies. Working closely with architects, designers, DFT, and the verification team, you will deliver high-quality silicon solutions and enjoy the buzz of seeing ...

Overview: The Verification IP (VIP) team develops and maintains a suite of tools used for the verification of various Arm Hardware IP products. The team provides reliable, accurate, consistent and well documented VIP for standard interface protocols, that are used by all Arm engineering design and verification teams. This is an excellent opportunity for a highly skilled and experienced verification engineer to join the VIP team. In this fast-paced technical role, you will be part of a team that develops VIP components for the latest AMBA protocols and work with various ...

development of next-generation silicon platforms, they are expanding their in-house ASIC capability to support an exciting product roadmap. The Opportunity As a Verification Engineer, you will take ownership for IP and chip level verification planning and execution, and will be constantly interacting with the design … team, composing detailed verification plans and creating test benches from scratch or using shared verification components. Responsibilities Take ownership for IP and chip level verification planning and execution. Interact with the design team to compose detailed verification plans. Create test benches from scratch or using shared ...

Resources is seeking a Verification Engineer in Cambridge for hands-on IP and chip verification planning and execution. You will collaborate with design teams to define verification plans and build test benches from scratch or with reusable verification components. The role requires experience with SystemVerilog ...

world-class engineering team based in Edinburgh, developing leading-edge IP for a wide range of high-tech markets. They are looking for a Senior Design Verification Engineer. As part of the Engineering group, you will play a key role in defining and driving the adoption of advanced … verification tools and methodologies, with a particular focus on AI and machine learning. This is a cross-functional role, collaborating with multiple projects and teams to accelerate the adoption of best-in-class verification practices. Key responsibilities Develop and support the adoption of generative AI tools to create ...

standard in made-for-AI compute hardware and software. A chance to be part of the AI revolution! I am looking for experienced Verification Engineers to join a world class silicon engineering team, joining a company who bring large and ongoing investment from one of the world’s leading … backers of innovative AI companies! SW Verification experience with Python, C/C++ is welcome alongside the traditional UVM based Verification. Responsibilities and duties Verification activities within the verification team Verification planning, specification and closure of functional coverage Providing feedback to architects Test generation and failure ...

Swedium Global Services is seeking an experienced ASIC Verification Engineer to join our growing verification team. You will lead SystemVerilog/UVM based verification, develop test plans, and verify UPF-powered features for complex ASIC/SoC designs. Remote from EU position with 8+ years … related experience; strong debugging and collaboration with design teams are essential for timely verification closure and regression testing. #J-18808-Ljbffr ...

Limited in Cambridge seeks a highly skilled verification engineer to join the VIP team, developing and maintaining VIP for AMBA protocols and coordinating with IP and Subsystem teams across Arm. You will design VIP components, work with AMBA Architects on new interface protocols, and drive VIP adoption … test benches while supporting users globally. This fast-paced role requires deep verification expertise, strong problem-solving, and excellent communication and teamwork skills, with #J-18808-Ljbffr ...

OLIX is seeking Senior/Staff Digital Verification Engineers to own the verification of high-throughput, real-time data-processing silicon across GHz-class clock domains, from algorithm modelling to RTL sign-off and silicon bring-up. You will collaborate with digital design, optics, and software teams … develop verification environments with SystemVerilog/UVM, constrained-random testing, and formal methods, and contribute to reusable verification methodologies while mentoring junior engineers. #J-18808-Ljbffr ...