of relevant industry experience as an FPGA engineer Advanced experience with VHDL Proficiency with Xilinx or Altera/Intel tools and platforms Experience with SystemVerilog, UVM, Mentor Modelsim, Matlab/Simulink, or other simulation and verification/validation tools Familiarity with scripting languages such as Python or Tcl Hands-on More ❯
or MSc degree in Electronics or Computer Science; Minimum 5 years of experience in designing FPGAs using VHDL; Experience with FPGA verification tools, like SystemVerilog or UVM; Experience with Xilinx or Altera/Intel tools and platforms; Experience with scripting languages like Python or Tcl; Experience in high-tech industry More ❯
or MSc degree in Electronics or Computer Science; Minimum 5 years of experience in designing FPGAs using VHDL; Experience with FPGA verification tools, like SystemVerilog or UVM; Experience with Xilinx or Altera/Intel tools and platforms; Experience with scripting languages like Python or Tcl; Experience in high-tech industry More ❯
Graphics Verification tools FPGA/ASIC RTL Design experience Proficiency in Object Oriented Programming (C++, JAVA) Proven proficiency in FPGA/ASIC verification using SystemVerilog Working knowledge of UVM/OVM methodology Experience with Advanced Functional Verification tools to report functional coverage Experience with scripting languages (Bash, Perl, Python, Tcl More ❯
DSP, or FPU architectures and debugging/testing strategies. Hands-on experience with ASIC, FPGA, and physical design tools (P&R). Proficiency in SystemVerilog, C, SystemC, C++, Python, Perl, or TCL. Knowledge of place and route methodologies. Strong communication skills, both written and spoken, in English. Who we are More ❯
Hertfordshire, United Kingdom Hybrid / WFH Options
Matchtech
in developing complex FPGA architectures and implementations using VHDL, Simulink, and targeting Xilinx, Intel, or Microsemi devices Proficiency in FPGA verification using VHDL and SystemVerilog/UVM testbench methodologies Familiarity with FPGA toolsets and Mentor Graphics verification tools such as QuestaSim and ModelSim Ability to write low-level software in More ❯
Great Chesterford, Essex, United Kingdom Hybrid / WFH Options
Tech Connect Group
O in FPGA. Solid understanding of high-speed digital circuit design for real-time systems. Skilled in simulation and hardware testing, with experience in SystemVerilog or similar tools. Software development experience in C/C++, Python or Rust. Competent with test equipment such as oscilloscopes, spectrum analysers, and signal generators. More ❯
Hertfordshire, South East, United Kingdom Hybrid / WFH Options
Defence
in developing complex FPGA architectures and implementations using VHDL, Simulink, and targeting Xilinx, Intel, or Microsemi devices Proficiency in FPGA verification using VHDL and SystemVerilog/UVM testbench methodologies Familiarity with FPGA toolsets and Mentor Graphics verification tools such as QuestaSim and ModelSim Ability to write low-level software in More ❯
and development (R&D), prototyping, and system integration to support mission-critical defense projects. Develop and optimize digital logic designs using VHDL, Verilog, or SystemVerilog (C is a bonus). Work closely with hardware engineers, embedded software developers, and RF engineers to integrate FPGA designs into embedded systems. Perform simulation More ❯
Great Chesterford, Essex, United Kingdom Hybrid / WFH Options
Holt Executive
/O in FPGA. Understanding of the design of high-speed digital circuits for real-time systems. Experience of design verification by both simulation (SystemVerilog or similar) and hardware testing. Experience of software design using C/C++, Python, or Rust. Proficient using test equipment such as oscilloscopes, spectrum analysers More ❯
Saffron Walden, Great Chesterford, Essex, United Kingdom Hybrid / WFH Options
Holt Executive
/O in FPGA. Understanding of the design of high-speed digital circuits for real-time systems. Experience of design verification by both simulation (SystemVerilog or similar) and hardware testing. Experience of software design using C/C++, Python, or Rust. Proficient using test equipment such as oscilloscopes, spectrum analysers More ❯
Edinburgh, Granton, City of Edinburgh, United Kingdom
Holt Executive
Experience Defence domain experience or relevant experience in the Aerospace industry Development and certification of airborne equipment New Product Introduction experience Independent verification using SystemVerilog/UVM Experience of embedded processor cores (e.g. ARM) in FPGA designs Qualifications Honours degree or equivalent in Electronics Engineering or another STEM-based subject More ❯
Edinburgh, Granton, City of Edinburgh, United Kingdom
Holt Executive
/documentation Desirable Development of real-time, embedded, safety-critical firmware, preferably in accordance with RTCA/DO-254 DAL D Independent verification using SystemVerilog/UVM Relevant experience in the Aerospace or Defence industry Experience of embedded processor cores (e.g. ARM) in FPGA designs Familiarity with latest FPGA device More ❯
Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯
Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯
Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯
Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯
Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯
london (city of london), south east england, united kingdom
Algo Capital Group
Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯
s degree or higher in Computer/Electrical Engineering or Computer Science. Experience with FPGA/ASIC design and verification. Proficiency in design languages: SystemVerilog/Verilog/VHDL. Strong foundation in C/C++ programming. Familiarity with common FPGA tools. Exceptional analytical and troubleshooting skills. Skills: Demonstrable capabilities in More ❯
of RTL synthesis, performance, and power analysis. In-depth understanding of digital design concepts and problem-solving capabilities. Proficient in HDL coding (VHDL, Verilog, SystemVerilog). System design knowledge, including clock domain management, reset schemes, and power management. Experience with SoC level verification (HW/SW co-verification, multi-mode More ❯
of RTL synthesis, performance, and power analysis. In-depth understanding of digital design concepts and problem-solving capabilities. Proficient in HDL coding (VHDL, Verilog, SystemVerilog). System design knowledge, including clock domain management, reset schemes, and power management. Experience with SoC level verification (HW/SW co-verification, multi-mode More ❯
of RTL synthesis, performance, and power analysis. In-depth understanding of digital design concepts and problem-solving capabilities. Proficient in HDL coding (VHDL, Verilog, SystemVerilog). System design knowledge, including clock domain management, reset schemes, and power management. Experience with SoC level verification (HW/SW co-verification, multi-mode More ❯
of RTL synthesis, performance, and power analysis. In-depth understanding of digital design concepts and problem-solving capabilities. Proficient in HDL coding (VHDL, Verilog, SystemVerilog). System design knowledge, including clock domain management, reset schemes, and power management. Experience with SoC level verification (HW/SW co-verification, multi-mode More ❯
of RTL synthesis, performance, and power analysis. In-depth understanding of digital design concepts and problem-solving capabilities. Proficient in HDL coding (VHDL, Verilog, SystemVerilog). System design knowledge, including clock domain management, reset schemes, and power management. Experience with SoC level verification (HW/SW co-verification, multi-mode More ❯