Design Verification Engineer
- Hiring Organisation
- Platform Recruitment
- Location
- Slough, Berkshire, UK
- Employment Type
- Full-time
testbench issues efficiently. At least two years of professional RTL functional verification experience for FPGA or ASIC designs. Hands-on expertise in SystemVerilog and UVM, including stimulus development and code/functional coverage collection and analysis. Proficiency in Python and/or C++ for building verification infrastructure, tooling, and automation. ...