Newbury, Berkshire, United Kingdom Hybrid / WFH Options
WISE Campaign
PCIe, CXL, UCIe, NVMe, Ethernet, USB, DDRx, HBM, AMBA. Knowledge of controllers for one or more high-speed interface protocols Expertise in coding with SystemVerilog, and UVM is mandatory Experience with integrating commercial VIP in SV/UVM bench required. Experience with Linux and Windows environments including scripting languages. Individual More ❯
Sondrel is looking for an experienced Verification Engineers to join our global team. In this hands-on technical role, you will contribute to a variety of SoC, subsystem, and IP development projects, taking responsibility for the verification process from planning More ❯
Newbury, Berkshire, United Kingdom Hybrid / WFH Options
WISE Campaign
About Us Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools More ❯
Senior FPGA Engineer £80-100k Slough Hybrid My client's innovative technologies have facilitated the deployment of high-speed internet and robust communication networks for remote and underserved areas, fostering digital inclusion and supporting the growth of smart cities More ❯
Maidenhead, Royal Borough of Windsor and Maidenhead, Berkshire, United Kingdom
Platform Recruitment
Senior FPGA Engineer | £80-100k | Slough | Hybrid My client's innovative technologies have facilitated the deployment of high-speed internet and robust communication networks for remote and underserved areas, fostering digital inclusion and supporting the growth of smart cities More ❯
strategies, you thrive on ensuring that designs comply with protocol standards and system requirements. You are experienced in creating and examining functional coverage, writing SystemVerilog assertions, and debugging RTL and gate-level simulation failures. Your background in firmware debugging and bug tracking using software tools like Jira sets you apart. … with sales, R&D, and other field AE teams to ensure customer and Synopsys goals are met. Creating and examining functional coverage and writing SystemVerilog assertions. Debugging RTL and gate-level simulation failures and firmware. Tracking bugs using software tools such as Jira and performing code coverage analysis. The Impact … the future of the verification team. What You'll Need: In-depth understanding of verification flows, test plans, and strategies. Expertise in constrained-random SystemVerilog testbenches using UVM or VMM. Experience in creating and examining functional coverage and writing SystemVerilog assertions. Skills in debugging RTL and gate-level simulation failures More ❯