DSP, or FPU architectures and debugging/testing strategies. Hands-on experience with ASIC, FPGA, and physical design tools (P&R). Proficiency in SystemVerilog, C, SystemC, C++, Python, Perl, or TCL. Knowledge of place and route methodologies. Strong communication skills, both written and spoken, in English. Who We Are More ❯
Manchester, England, United Kingdom Hybrid / WFH Options
Arm
Project Management on activities, plans, and schedules. Required Skills and Experience: Experience of RTL design for complex SoC development using Verilog and/or SystemVerilog Experience in the following areas: Static design checks, Synthesis and timing analysis, Power management techniques, Power and Clock domain crossing Exposure to all stages of More ❯
Manchester, England, United Kingdom Hybrid / WFH Options
Arm
Project Management on activities, plans, and schedules. Required Skills and Experience Experience of RTL design for complex SoC development using Verilog and/or SystemVerilog Experience in the following areas Static design checks, Synthesis and timing analysis, Power management techniques, Power and Clock domain crossing Exposure to all stages of More ❯
Stockport, England, United Kingdom Hybrid / WFH Options
JR United Kingdom
help build low-latency/high-throughput applications. What skills and experience is required: FPGA Design, development and testing experience Previous experience in using SystemVerilog, VHDL and/or Verilog Software skills using C/C++ or Python Exposure to Quartus and/or Vivado Any exposure or understanding of More ❯
determine verification requirements from the analysis of specifications Experience of debug and testing methodologies Experience with industry-standard verification methodologies and tools (UVM/SystemVerilog, Tools like VCS/Cadence/Questa) Experience in version control systems (e.g., Git/Mercurial/Perforce/Subversion) You might also have: A More ❯
Bolton, England, United Kingdom Hybrid / WFH Options
MBDA
Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at the forefront of innovation. Apply now More ❯
Social network you want to login/join with: Aion Silicon is looking for an experienced Verification Engineers to join our office in Theale/Bristol. In this hands-on technical role, you will contribute to a variety of SoC More ❯
Social network you want to login/join with: col-narrow-left Client: Aion Silicon Location: bolton, greater manchester, United Kingdom Job Category: Other - EU work permit required: Yes col-narrow-right Job Views: 1 Posted: 06.06.2025 Expiry Date: 21.07.2025 More ❯
Social network you want to login/join with: col-narrow-left Client: Aion Silicon Location: manchester, United Kingdom Job Category: Other - EU work permit required: Yes col-narrow-right Job Views: 1 Posted: 06.06.2025 Expiry Date: 21.07.2025 col-wide More ❯
Manchester, England, United Kingdom Hybrid / WFH Options
Arm
1 day ago Be among the first 25 applicants Get AI-powered advice on this job and more exclusive features. Job ID 2024-13226 Date posted 13/01/2025 Location Manchester, United Kingdom Category Architecture Job Overview In More ❯
Social network you want to login/join with: Application Specific Integrated Circuit Design Engineer, bolton, greater manchester col-narrow-left Client: IC Resources Location: bolton, greater manchester, United Kingdom Job Category: Other - EU work permit required: Yes col-narrow More ❯
Social network you want to login/join with: Application Specific Integrated Circuit Design Engineer, stockport col-narrow-left Client: IC Resources Location: stockport, United Kingdom Job Category: Other - EU work permit required: Yes col-narrow-right Job Views: 3 More ❯
Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing More ❯
Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing More ❯
Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing More ❯