Principal Digital (RTL) Design Engineer
Bracknell, England, United Kingdom
Onsemi
following activities: Digital design using RTL coding, block and top-level verification, digital constraints, synthesis, ATPG, STA, etc. Expertise in SystemVerilog and RTL design and verification Coding skills in tcl/perl/Python and Verilog/SystemVerilog RTL Experience in maintaining design processes Added Value Knowledge of CMOS image sensors Understanding of designing for the automotive ADAS market Ability … logic, filters, memory interfaces), digital verification (randomized testing, code coverage, verification), UVM (a plus), logic synthesis, DFT, ATPG, STA skills (a plus), Linux, and scripting languages (Perl, Python, shell, tcl) #J-18808-Ljbffr More ❯
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