implementations using VHDL, Simulink, and other tools to target Xilinx, Intel, and Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog/UVM test bench methodologies. FPGA design using Mentor verification tools, including QuestaSim and ModelSim. Developing low-level software (in C) to facilitate FPGA testing and integration more »
Stevenage, Hertfordshire, South East, United Kingdom
Guidant Global
FPGA Design Engineer: The candidate will generate complex FPGA architectures, design and verify implementations using various tools, including VHDL, Simulink, and System Verilog/UVM test bench methodologies. They will also develop low-level software for FPGA testing and integration, create high-quality designs and documentation, and work in a more »
Employment Type: Contract
Rate: £65 - £90 per hour + In IR35 (PAYE & Umbrella available) DOE
Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog\UVM test-bench methodologies. Using FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Generating low-level software (C) to facilitate FPGA test and integration more »
Stevenage, Hertfordshire, South East, United Kingdom
Henderson Scott
Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog\UVM test-bench methodologies. Using FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Generating low-level software (C) to facilitate FPGA test and integration more »
Stevenage, Hertfordshire, South East, United Kingdom
Omega Resource Group
Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog\UVM test-bench methodologies. Using FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Generating low-level software (C) to facilitate FPGA test and integration more »