Verification Engineer - CPU
Manchester Area, United Kingdom
Hybrid / WFH Options
Hybrid / WFH Options
European Recruitment
experience is a must - Experience in designing verification environments for RTL designs - Experience with SystemVerilog or Specman - Understanding of end to end verification processes - UVM knowledge is a bonus - Understanding of memory protection, translation, vector processing in CPU's is a bonus - Assembly language knowledge and C/C++ etc more »
Posted: