2 of 2 UVM Jobs in Rochester

digital hardware design for FPGA using VHDL Experience and knowledge of video processing and control law algorithms Working knowledge and experience of UVM (Universal Verification Methodology) constrained random verification This really is a fantastic opportunity for an FPGA Engineer to progress their career. If you are interested please apply as More ❯

your own workstreams, mentor junior engineers, and contribute to innovation using cutting-edge tools and technique, such as model-based design and UVM(Universal Verification Methodology). What You?ll Need: Degree/HND in Electronics or similar Strong FPGA/PLD development experience Proficient in VHDL, synthesis, simulation, and … verification tools Solid grasp of design constraints and system integration Bonus if you bring: Experience with video processing or control algorithms Knowledge of UVM and constrained-random verification Background in safety-critical or high-integrity systems Disclaimer: This vacancy is being advertised by either Advanced Resource Managers Limited, Advanced Resource More ❯