the ASIC. Model algorithms and validate concepts in MATLAB/Simulink (or equivalent), ensuring functional equivalence through to gate‐level sign‐off. Own RTL development (SystemVerilog/Verilog/VHDL) including synthesis, static‐timing closure, formal and constrained‐random verification. Analyse power, performance and area (PPA); implement innovative techniques to achieve aggressive bandwidth‐per‐watt targets. Collaborate with optical‐hardwareMore ❯
IP design, implementation, and verification. Strong knowledge of RTL synthesis, performance, and power analysis. In-depth understanding of digital design concepts and problem-solving capabilities. Proficient in HDL coding (VHDL, Verilog, SystemVerilog). System design knowledge, including clock domain management, reset schemes, and power management. Experience with SoC level verification (HW/SW co-verification, multi-mode simulation, gate-level More ❯
Computer Engineering (CE), Electrical Engineering (EE), Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working with digital simulators More ❯
Newbury, Berkshire, United Kingdom Hybrid / WFH Options
Siemens AG
The use of static & formal verification tools including property checking using SVA or PSL. Expertise in clock/reset and low power design & verification techniques. Experience of RTL coding (VHDL/Verilog/System Verilog). Experience with Linux and Windows environments including scripting languages. Excellent presentation and communication skills in English (knowledge of other European languages would be an More ❯
obtain DOD/IC Security Clearance. BS/MS in Computer Science, Electrical Engineering, or equivalent experience 2-5 years of experience with FPGAs with knowledge of Verilog/VHDL Experience modeling and simulating analog and digital architectures. +2 years of ASIC development and design implementation and verification using Verilog/VHDL Ability to read and create schematics. Experience with More ❯
Experience in using emulation and FPGA prototyping. Embedded software development and HW/SW co-design and verification. Experience with Hardware Design and Verification languages including PSL, SVA, Verilog, VHDL, System Verilog, System-C, TLM. Experience of the IP/SoC verification process. Experience with Unix/Linux environment including scripting languages. Good Communication and presentation skills. Additional Information Cadence More ❯
and instrumentation, including oscilloscopes, multimeters, logic analyzers, function generators, power supplies, and data acquisition. 5+ years of ASIC development 2+ years of design implementation and verification using Verilog/VHDL 5+ years of experience with FPGAs with knowledge of Verilog/VHDL 5+ years of experience with testing ASIC designs Willing to travel within the Continental United States (CONUS). More ❯
standards: DO-254, IEC 61508, IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/UVVM (or UVM) methodologies and test bench More ❯
Social network you want to login/join with: col-wide Job Description: Description Role purpose Define, architect, design, develop, document and test complex FPGA firmware functions and algorithms within the Cyber UK Business Unit. Scope Define, architect, design, develop More ❯