5 of 5 Verification Engineer Jobs in London

Job Title: Hardware Design and Verification Engineer Position: Junior - Mid level Engineers Type: Contract or Permanent Location: Hertfordshire Hybrid Salary Range: Negotiable Client Information: We are building a revolutionary RISC-V-based GPU and AI platform, and we're hiring talented engineers in Hardware Design and Hardware Verification to join us on this mission. If you thrive … V vector core GPU Design high-performance, power-efficient compute units for graphics and AI workloads Optimize microarchitecture to meet performance, power, and area (PPA) targets Work collaboratively with verification teams to ensure correctness and efficiency Participate in design reviews and contribute to technical decision-making Document technical specifications and development progress Contribute to bring-up, synthesis, and physical … aware design flows Verification Responsibilities: Develop UVM/SystemVerilog testbenches and functional verification plans Implement directed and constrained-random tests for robust coverage Execute regression testing, debug RTL, and track issues to resolution Verify block-level and system-level behavior for our GPU and AI IPs Utilize formal verification techniques when applicable Measure and validate system performance More ❯

Principal Verification & Validation (V&V) Engineer Location: South-West London (Hybrid working available) Salary Range: £45,000 - £70,000 UK Citizenship: Required Overview: A leading organisation in the defence and national security sector is seeking a Principal V&V Engineer to support the planning, execution, and reporting of verification and validation (V&V) activities. This role More ❯

to design and procurement of the space segment, ground segment and user infrastructure to provide communications services by the end of the decade. We are seeking a systems-oriented engineer to lead the integration, verification, validation (IVV), and operational readiness of a complex satellite communications system. You will ensure alignment from satellite manufacture through to ground operations and … service delivery, with a focus on the entire end-to-end chain. The day-to-day • Define and implement a comprehensive end-to-end communications verification strategy across terminal, ground, and space segments. Lead the development and execution of the system-level IVV roadmap for the communications service. • Design and implement an end-to-end communications test bed, identifying … and engaging industry partners as needed. • Own the test lifecycle, including defining verification methods, maintaining Verification Control Matrices (VCMs) and Documents (VCDs), generating Test Plans, Test Procedures, and issuing Test Reports. • Support the planning and execution of Satellite Validation Tests (SVT), including simulation campaigns and operations command/telemetry validation. • Contribute to the planning and definition of System More ❯

spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators. These high performance designs require even higher performance verification. We are looking for experienced Design Verification (DV) engineers who are skilled at writing testbenches and building verification environments to exercise complex HDL. Our ideal candidate is not only an ace tester, but a practicing … redesign, and surpass the status quo. For example, members of our team are active maintainers of popular open source projects such as Slang, Verilator, and Cocotb. FPGA and ASIC verification is part of an innovative, growing team at HRT which is integral to the success of our trading. You can expect to always be challenged by the ever-changing … designs Managing test suites and continuous integration infrastructure Developing and improving open-source and internal tools Qualifications Superb debug and analytical skills Professional experience (2+ years) in RTL functional verification for FPGA or ASIC Experience with code and functional coverage collection/analysis Experience with SystemVerilog and industry-standard frameworks such as UVM Experience with Python Familiarity with Verilator More ❯

within the community. So, what's your possible? Opportunity: This is more than just a job; it's a mission. Salary: £47,400- £67,000 The V&V Principal engineer will support the planning, conduct and reporting of V&V work packages and activities in order to prove our hardware and software product compliance to their associated requirements. The … V&V Principal Engineer will work within multi-disciplined project teams under direction of the project delivery management and V&V leadership to effectively and efficiently deliver the assigned V&V activities. Our UK Defence business is a Sovereign software and systems centre of excellence. As well as developing and supporting UK wide and internationally deployed multi-domain command More ❯