10 of 10 Verification Engineer Jobs in the Thames Valley

Digital Verification Engineer with a strong Semiconductor background involving the verification of complex designs (FPGA or ASIC) and with some UVM experience are sought by an exciting new name in the Semiconductor industry. Competitive salary plus Hybrid working, Shares and good benefits. The successful Digital Verification Engineer will work with designers in verification and validation of circuit designs, developing design verification methodologies whilst utilizing the latest techniques, tools and technologies for design verification activities. Skills and Experience required for Digital Verification Engineer: Bachelors/Masters Degree in Electronic/ ...

Digital Verification Engineer European Tech Recruit are working closely with a leading semiconductor company, based in Reading, who are looking for a talented Digital Verification Engineer to join their team. This role can also be available working out of their Lausanne (Switzerland), Northampton (UK) or Dortmund … Germany) offices. Responsibilities as Digital Verification Engineer: Develop design verification methodologies and implement standard debug flows. Work with designers in verification and validation of circuit designs. Participate in design reviews. Prepare design verification plan based on design specifications. Plan and schedule assigned projects for timely ...

Digital Verification Engineer European Tech Recruit are working closely with a leading semiconductor company, based in Reading, who are looking for a talented Digital Verification Engineer to join their team. This role can also be available working out of their Lausanne (Switzerland), Northampton (UK) or Dortmund … Germany) offices. Responsibilities as Digital Verification Engineer: Develop design verification methodologies and implement standard debug flows. Work with designers in verification and validation of circuit designs. Participate in design reviews. Prepare design verification plan based on design specifications. Plan and schedule assigned projects for timely ...

Formal Verification Engineer - Reading This role can also be based in Northampton, Dortmund, Lausanne and Copenhagen An established yet fast-scaling semiconductor company known for developing advanced, low-power, high-speed connectivity solutions used in next-generation computing and consumer electronics. They’re looking to expand their formal … verification capability and are now hiring a skilled Formal Verification Engineer to support their European design teams. This Formal Verification Engineer will work closely with design, micro-architecture and verification groups to shape and execute effective formal strategies across complex digital IP. The role ...

looking for a Mixed Signal Verification Engineer to join our fabless Semiconductor client. This role can be based either in Northamptonshire, or in Berkshire. Hybrid working (3 days a week onsite) is available with this role. The Mixed Signal Verification Engineer will be responsible for developing … verification strategy for high-speed circuit designs in an analog/mixed-signal environment. Defining test cases, modelling components, and running AMS simulations will all form part of this critical role, together with identifying bugs, and developing new methodologies with the verification team and EDA vendors. The successful ...

Digital Verification Engineer with a strong Semiconductor background involving the verification of complex designs (FPGA or ASIC) and with some UVM experience are sought by an exciting new name in the Semiconductor industry. Competitive salary plus Hybrid working, Shares and good benefits. The successful Digital Verification Engineer will work with designers in verification and validation of circui click apply for full job details ...

Digital Verification Engineers with a strong Semiconductor background involving the verification of complex designs (FPGA or ASIC) and with some UVM experience are sought by an exciting new name in the Semiconductor industry. Competitive salary plus Hybrid working, Shares and good benefits. The successful Digital Verification Engineer ...

Formal Verification Engineers – £50k-£130k – Oxford Due to our continued growth, our semiconductor client is looking for an Formal Verification Engineers to join their cutting-edge SoC team in the development of ASICs. The successful candidates will be working with experts in different aspects of SoC development … further your career development. The successful candidates will be able to and open to learn other areas and specialisms outside ASIC Design and Verification from RTL Design, Formal Verification and DevOps. The successful candidate will also be working directly for an industry renowned Senior Director who has built ...

Formal Verification Engineers – £50k-£130k – Oxford Due to our continued growth, our semiconductor client is looking for an Formal Verification Engineers to join their cutting-edge SoC team in the development of ASICs. The successful candidates will be working with experts in different aspects of SoC development … further your career development. The successful candidates will be able to and open to learn other areas and specialisms outside ASIC Design and Verification from RTL Design, Formal Verification and DevOps. The successful candidate will also be working directly for an industry renowned Senior Director who has built ...

seeking an experienced Digital Verification Lead Engineer to drive verification strategy, lead multi-site teams, and contribute to the development of cutting-edge semiconductor products. This role can be based out of the following locations: Lausanne (Switzerland), Reading/Northampton (UK), Dortmund (Germany), or Copenhagen (Denmark). … Responsibilities Lead digital verification activities across assigned projects Provide technical leadership, guidance, and mentoring to team members Develop comprehensive verification plans from design specifications Plan and schedule project tasks, assigning and tracking workloads across the team Define and implement verification methodologies, including standardized debug flows Participate ...