5 of 5 Verilog Jobs in County Antrim

up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers … Memory controllers PCB Layout Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key Skills : FPGA design, Verilog Apply: jamie AT enterpriserecruitment DOT com JBRP1_UKTJ More ❯

up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers … Memory controllers PCB Layout Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key Skills : FPGA design, Verilog Apply: jamie AT enterpriserecruitment DOT com JBRP1_UKTJ More ❯

validation What we need to see: Honours Degree in Electrical Engineering or Computer Science, or equivalent experience 5+ years of proven experience in RTL verification experience Knowledge of HDL (Verilog/VHDL) Experience in building test benches, debugging simulation failures and evaluating/closing coverage Exposure to industry standard verification tools for simulation and debug Strong interpersonal skills and the More ❯

verification solutions. Key Responsibilities: Perform SOC verification with a focus on ARM ecosystem and PCIe, including PCIe-VIP usage. Develop and execute test plans, test benches, and simulations using Verilog, SystemVerilog, and UVM. Conduct GLS (Gate Level Simulation) and ensure comprehensive code and functional coverage. Collaborate with onsite and offshore teams to coordinate verification activities and deliverables. Utilize GIT for … strong analytical and problem-solving skills throughout the verification process. Skills, Experience, and Abilities Required: 5 to 10 years of industry experience in SOC/IP verification. Expertise in Verilog, SystemVerilog, and UVM. Strong experience with code coverage, functional coverage, and test development. Hands-on experience with ARM ecosystem and PCIe protocols. Proficient in C/SystemVerilog and familiar with More ❯

verification solutions. Key Responsibilities: Perform SOC verification with a focus on ARM ecosystem and PCIe, including PCIe-VIP usage. Develop and execute test plans, test benches, and simulations using Verilog, SystemVerilog, and UVM. Conduct GLS (Gate Level Simulation) and ensure comprehensive code and functional coverage. Collaborate with onsite and offshore teams to coordinate verification activities and deliverables. Utilize GIT for … strong analytical and problem-solving skills throughout the verification process. Skills, Experience, and Abilities Required: 5 to 10 years of industry experience in SOC/IP verification. Expertise in Verilog, SystemVerilog, and UVM. Strong experience with code coverage, functional coverage, and test development. Hands-on experience with ARM ecosystem and PCIe protocols. Proficient in C/SystemVerilog and familiar with More ❯